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    Searched refs:MEM_MASK (Results 1 - 4 of 4) sorted by null

  /external/pcre/dist/sljit/
sljitNativeTILEGX_64.c 92 #define MEM_MASK 0x1f
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sljitNativeSPARC_common.c 398 #define MEM_MASK 0x1f
534 FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK]
535 | ((flags & MEM_MASK) <= GPR_REG ? D(reg) : DA(reg))
537 ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? DR(reg) : MOVABLE_INS));
592 else if ((flags & LOAD_DATA) && ((flags & MEM_MASK) <= GPR_REG) && reg != base && reg != OFFS_REG(arg))
613 else if ((flags & LOAD_DATA) && ((flags & MEM_MASK) <= GPR_REG) && reg != base)
621 dest = ((flags & MEM_MASK) <= GPR_REG ? D(reg) : DA(reg));
622 delay_slot = ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? DR(reg) : MOVABLE_INS;
624 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | dest | S1(arg2) | IMM(0), delay_slot);
626 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | dest | S1(base) | S2(arg2), delay_slot)
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sljitNativeMIPS_common.c 505 #define MEM_MASK 0x1f
724 FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(arg & REG_MASK)
725 | TA(reg_ar) | IMM(argw), ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? reg_ar : MOVABLE_INS));
767 if ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) {
788 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
794 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
797 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
803 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), delay_slot);
823 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
826 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), delay_slot)
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sljitNativePPC_common.c 528 #define MEM_MASK 0x7f
733 ((inst) | (((flags) & MEM_MASK) <= GPR_REG ? D(reg) : FD(reg)))
737 (((inst) & ~(INT_ALIGNED | UPDATE_REQ)) | (((flags) & MEM_MASK) <= GPR_REG ? D(reg) : FD(reg)))
873 inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
883 inst = data_transfer_insts[inp_flags & MEM_MASK];
898 inst = data_transfer_insts[inp_flags & MEM_MASK];
969 tmp_r = ((inp_flags & LOAD_DATA) && ((inp_flags) & MEM_MASK) <= GPR_REG) ? reg : TMP_REG1;
993 inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
1001 inst = data_transfer_insts[inp_flags & MEM_MASK];
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