| /external/pcre/dist/ |
| pcre_jit_compile.c | 523 #define OP1(op, dst, dstw, src, srcw) \
[all...] |
| /external/chromium_org/v8/src/compiler/ |
| js-operator.h | 75 #define OP1(name, ptype, pname, properties, inputs, outputs) \
116 OP1(JSCallFunction, CallParameters, parameters, Operator::kNoProperties,
130 OP1(JSLoadNamed, LoadNamedParameters, parameters, Operator::kNoProperties,
135 OP1(JSStoreProperty, StrictMode, strict_mode, Operator::kNoProperties, 3,
141 OP1(JSStoreNamed, StoreNamedParameters, parameters, Operator::kNoProperties,
146 OP1(JSDeleteProperty, StrictMode, strict_mode, Operator::kNoProperties, 2,
154 OP1(JSLoadContext, ContextAccess, access,
159 OP1(JSStoreContext, ContextAccess, access, Operator::kNoProperties, 2, 0);
171 OP1(JSCreateCatchContext, Unique<String>, name, Operator::kNoProperties, 1,
186 OP1(JSCallRuntime, Runtime::FunctionId, function, Operator::kNoProperties
[all...] |
| graph-reducer-unittest.cc | 24 SimpleOperator OP1(1, Operator::kNoProperties, 1, 1, "op1");
80 Node* node1 = graph()->NewNode(&OP1, node0);
81 Node* node2 = graph()->NewNode(&OP1, node0);
|
| /external/llvm/lib/Target/R600/ |
| R600Defines.h | 41 OP1 = (1 << 10),
|
| R600InstrInfo.cpp | 146 return ((TargetFlags & R600_InstFlag::OP1) |
[all...] |
| /bionic/libc/kernel/uapi/asm-arm64/asm/ |
| kvm.h | 114 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) (KVM_REG_ARM64 | KVM_REG_ARM64_SYSREG | ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | ARM64_SYS_REG_SHIFT_MASK(crn, CRN) | ARM64_SYS_REG_SHIFT_MASK(crm, CRM) | ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
|
| /external/kernel-headers/original/uapi/asm-arm64/asm/ |
| kvm.h | 137 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \
140 ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | \
|
| /prebuilts/ndk/9/platforms/android-21/arch-arm64/usr/include/asm/ |
| kvm.h | 114 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) (KVM_REG_ARM64 | KVM_REG_ARM64_SYSREG | ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | ARM64_SYS_REG_SHIFT_MASK(crn, CRN) | ARM64_SYS_REG_SHIFT_MASK(crm, CRM) | ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
|
| /external/chromium_org/third_party/mesa/src/src/gallium/state_trackers/d3d1x/gd3d1x/ |
| sm4_to_tgsi.cpp | 239 #define OP1(n) OP1_(n, n)
258 OP1(MOV);
265 OP1(FRC);
266 OP1(RCP);
275 OP1(NOT);
284 OP1(RSQ);
495 OP1(INEG);
|
| /external/mesa3d/src/gallium/state_trackers/d3d1x/gd3d1x/ |
| sm4_to_tgsi.cpp | 239 #define OP1(n) OP1_(n, n)
258 OP1(MOV);
265 OP1(FRC);
266 OP1(RCP);
275 OP1(NOT);
284 OP1(RSQ);
495 OP1(INEG);
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p2/src/ |
| omxVCM4P2_MCReconBlock_s.s | 298 LCLS OP1
301 OP1 SETS "AND"
304 OP1 SETS "ORR"
316 $OP1 $lsb0, $lsb0, $lsb1 ;// e0 = e0 & e1
|
| /external/llvm/lib/Target/R600/MCTargetDesc/ |
| R600MCCodeEmitter.cpp | 136 ((Desc.TSFlags & R600_InstFlag::OP1) ||
|
| /external/valgrind/main/VEX/test/ |
| test-i386.h | 27 #ifdef OP1
|
| test-amd64.c | 97 #define OP1
102 #define OP1
107 #define OP1
112 #define OP1
368 void test_imulw2(int64 op0, int64 op1)
372 s1 = op1;
386 void test_imull2(int64 op0, int64 op1)
391 s1 = op1;
405 #define TEST_IMUL_IM(size, size1, op0, op1)\
416 : "r" (op1), "1" (flags), "0" (res));
[all...] |
| test-amd64.h | 26 #ifdef OP1
|
| test-i386.c | 87 #define OP1
92 #define OP1
97 #define OP1
102 #define OP1
356 void test_imulw2(int op0, int op1)
360 s1 = op1;
374 void test_imull2(int op0, int op1)
378 s1 = op1;
392 #define TEST_IMUL_IM(size, size1, op0, op1)\
403 : "r" (op1), "1" (flags), "0" (res));
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelDAGToDAG.cpp | 848 SDValue OP1;
[all...] |
