| /external/pcre/dist/sljit/ |
| sljitNativeX86_64.c | 36 *inst++ = REX_W | ((reg_map[reg] <= 7) ? 0 : REX_B);
51 *code_ptr++ = REX_W | REX_B;
78 *code_ptr++ = REX_W | REX_B;
143 *inst++ = REX_W;
148 *inst++ = REX_W | REX_R;
153 *inst++ = REX_W | REX_R;
159 *inst++ = REX_W;
164 *inst++ = REX_W;
169 *inst++ = REX_W | REX_B;
185 *inst++ = REX_W;
[all...] |
| sljitNativeX86_common.c | 110 #define REX_W 0x48
593 *inst++ = REX_W;
618 *inst++ = REX_W;
796 *inst++ = REX_W;
819 *inst++ = REX_W | ((op >= SLJIT_UDIV) ? REX_B : 0);
826 *inst++ = REX_W;
[all...] |
| /art/compiler/dex/quick/x86/ |
| assemble_x86.cc | 81 { kX86 ## opname ## 64MR, kMemReg, mem_use | IS_TERTIARY_OP | REG_USE02 | SETS_CCODES | uses_ccodes, { REX_W, 0, rm32_r32, 0, 0, 0, 0, 0, false }, #opname "64MR", "[!0r+!1d],!2r" }, \
82 { kX86 ## opname ## 64AR, kArrayReg, mem_use | IS_QUIN_OP | REG_USE014 | SETS_CCODES | uses_ccodes, { REX_W, 0, rm32_r32, 0, 0, 0, 0, 0, false }, #opname "64AR", "[!0r+!1r<<!2d+!3d],!4r" }, \
83 { kX86 ## opname ## 64TR, kThreadReg, mem_use | IS_BINARY_OP | REG_USE1 | SETS_CCODES | uses_ccodes, { THREAD_PREFIX, REX_W, rm32_r32, 0, 0, 0, 0, 0, false }, #opname "64TR", "fs:[!0d],!1r" }, \
84 { kX86 ## opname ## 64RR, kRegReg, IS_BINARY_OP | reg_def | REG_USE01 | SETS_CCODES | uses_ccodes, { REX_W, 0, r32_rm32, 0, 0, 0, 0, 0, false }, #opname "64RR", "!0r,!1r" }, \
85 { kX86 ## opname ## 64RM, kRegMem, IS_LOAD | IS_TERTIARY_OP | reg_def | REG_USE01 | SETS_CCODES | uses_ccodes, { REX_W, 0, r32_rm32, 0, 0, 0, 0, 0, false }, #opname "64RM", "!0r,[!1r+!2d]" }, \
86 { kX86 ## opname ## 64RA, kRegArray, IS_LOAD | IS_QUIN_OP | reg_def | REG_USE012 | SETS_CCODES | uses_ccodes, { REX_W, 0, r32_rm32, 0, 0, 0, 0, 0, false }, #opname "64RA", "!0r,[!1r+!2r<<!3d+!4d]" }, \
87 { kX86 ## opname ## 64RT, kRegThread, IS_LOAD | IS_BINARY_OP | reg_def | REG_USE0 | SETS_CCODES | uses_ccodes, { THREAD_PREFIX, REX_W, r32_rm32, 0, 0, 0, 0, 0, false }, #opname "64RT", "!0r,fs:[!1d]" }, \
88 { kX86 ## opname ## 64RI, kRegImm, IS_BINARY_OP | reg_def | REG_USE0 | SETS_CCODES | uses_ccodes, { REX_W, 0, rm32_i32, 0, 0, rm32_i32_modrm, ax32_i32, 4, false }, #opname "64RI", "!0r,!1d" }, \
89 { kX86 ## opname ## 64MI, kMemImm, mem_use | IS_TERTIARY_OP | REG_USE0 | SETS_CCODES | uses_ccodes, { REX_W, 0, rm32_i32, 0, 0, rm32_i32_modrm, 0, 4, false }, #opname "64MI", "[!0r+!1d],!2d" }, \
90 { kX86 ## opname ## 64AI, kArrayImm, mem_use | IS_QUIN_OP | REG_USE01 | SETS_CCODES | uses_ccodes, { REX_W, 0, rm32_i32, 0, 0, rm32_i32_modrm, 0, 4, false }, #opname "64AI", "[!0r+!1r<<! (…)
[all...] |
| x86_lir.h | [all...] |
| /external/qemu/disas/ |
| i386.c | 130 #define REX_W 8
[all...] |
| /art/disassembler/ |
| disassembler_x86.cc | 61 constexpr uint8_t REX_W = 0b1000;
69 bool rex_w = (rex & REX_W) != 0; local
72 } else if (rex_w) {
271 if ((rex & REX_W) != 0) {
1081 uint8_t rex_w = (supports_rex_ && target_specific) ? (rex | 0x48) : rex; local
[all...] |
| /external/chromium_org/third_party/mach_override/libudis86/ |
| decode.c | 39 #define REX_W(r) ( ( 0xF & ( r ) ) >> 3 )
133 eff_opr_mode(int dis_mode, int rex_w, int pfx_opr)
136 return rex_w ? 64 : (pfx_opr ? 16 : 32);
861 if ( REX_W( u->pfx_rex ) ) {
998 idx = eff_opr_mode(u->dis_mode, REX_W(u->pfx_rex), u->pfx_opr) / 32;
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86BaseInfo.h | 382 // REX_W - REX prefixes are instruction prefixes used in 64-bit mode.
388 REX_W = 1 << REXShift,
476 /// way as REX_W is for regular SSE instructions.
|
| X86MCCodeEmitter.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86CodeEmitter.cpp | 170 if (Desc.TSFlags & X86II::REX_W)
[all...] |
| X86InstrInfo.cpp | [all...] |
