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Searched
refs:RI12
(Results
1 - 3
of
3
) sorted by null
/external/valgrind/main/VEX/priv/
host_arm64_defs.c
242
am->ARM64am.
RI12
.reg = reg;
243
am->ARM64am.
RI12
.uimm12 = uimm12;
244
am->ARM64am.
RI12
.szB = szB;
269
vex_printf("%u(", (UInt)am->ARM64am.
RI12
.szB
270
* (UInt)am->ARM64am.
RI12
.uimm12);
271
ppHRegARM64(am->ARM64am.
RI12
.reg);
292
addHRegUse(u, HRmRead, am->ARM64am.
RI12
.reg);
309
am->ARM64am.
RI12
.reg = lookupHRegRemap(m, am->ARM64am.
RI12
.reg);
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...]
host_arm64_defs.h
140
}
RI12
;
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...]
host_arm64_isel.c
259
the baseblock register (X21). This generates an
RI12
amode, which
857
toBool( hregClass(am->ARM64am.
RI12
.reg) == HRcInt64
858
&& (hregIsVirtual(am->ARM64am.
RI12
.reg)
859
/* || sameHReg(am->ARM64am.
RI12
.reg,
861
&& am->ARM64am.
RI12
.uimm12 < 4096
862
&& isValidScale(am->ARM64am.
RI12
.szB) );
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...]
Completed in 4992 milliseconds