| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 358 SmallVectorImpl<CCValAssign> &RVLocs,
364 std::reverse(RVLocs.begin(), RVLocs.end());
529 SmallVector<CCValAssign, 16> RVLocs;
537 getTargetMachine(), RVLocs, *DAG.getContext());
540 AnalyzeReturnValues(CCInfo, RVLocs, Outs);
546 for (unsigned i = 0; i != RVLocs.size(); ++i) {
547 CCValAssign &VA = RVLocs[i];
721 SmallVector<CCValAssign, 16> RVLocs;
723 getTargetMachine(), RVLocs, *DAG.getContext())
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | [all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 190 SmallVector<CCValAssign, 16> RVLocs;
194 DAG.getTarget(), RVLocs, *DAG.getContext());
205 for (unsigned i = 0; i != RVLocs.size(); ++i) {
206 CCValAssign &VA = RVLocs[i];
250 SmallVector<CCValAssign, 16> RVLocs;
254 DAG.getTarget(), RVLocs, *DAG.getContext());
267 for (unsigned i = 0; i != RVLocs.size(); ++i) {
268 CCValAssign &VA = RVLocs[i];
296 if (i+1 < RVLocs.size() && RVLocs[i+1].getLocReg() == VA.getLocReg())
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 322 SmallVector<CCValAssign, 16> RVLocs;
326 getTargetMachine(), RVLocs, *DAG.getContext());
335 for (unsigned i = 0; i != RVLocs.size(); ++i) {
336 CCValAssign &VA = RVLocs[i];
373 SmallVector<CCValAssign, 16> RVLocs;
376 getTargetMachine(), RVLocs, *DAG.getContext());
381 for (unsigned i = 0; i != RVLocs.size(); ++i) {
383 RVLocs[i].getLocReg(),
384 RVLocs[i].getValVT(), InFlag).getValue(1);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | [all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFastISel.cpp | [all...] |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64FastISel.cpp | [all...] |
| AArch64ISelLowering.cpp | [all...] |
