| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | [all...] |
| /external/llvm/lib/CodeGen/ |
| Analysis.cpp | 155 case FCmpInst::FCMP_OGT: return ISD::SETOGT;
179 case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT;
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 299 case ISD::SETOGT: return "setogt";
|
| TargetLowering.cpp | 153 case ISD::SETOGT:
170 // SETONE = SETOLT | SETOGT
[all...] |
| SelectionDAG.cpp | 343 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
[all...] |
| LegalizeDAG.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 606 case ISD::SETOGT:
627 case ISD::SETOGT:
628 case ISD::SETGT: return 1; // Bit #1 = SETOGT
705 case ISD::SETOGT:
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 133 setOperationAction(ISD::SETOGT, VT, Expand);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 133 setOperationAction(ISD::SETOGT, VT, Expand);
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 192 setCondCodeAction(ISD::SETOGT, MVT::f32, Expand);
197 setCondCodeAction(ISD::SETOGT, MVT::f64, Expand);
321 setCondCodeAction(ISD::SETOGT, Ty, Expand);
[all...] |
| MipsISelLowering.cpp | 474 case ISD::SETOGT: return Mips::FCOND_OGT;
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
