| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | [all...] |
| /external/llvm/lib/CodeGen/ |
| Analysis.cpp | 162 case FCmpInst::FCMP_UEQ: return ISD::SETUEQ;
175 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ;
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| R600ISelLowering.cpp | 449 case ISD::SETUEQ:
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 307 case ISD::SETUEQ: return "setue";
|
| TargetLowering.cpp | 190 case ISD::SETUEQ:
[all...] |
| SelectionDAG.cpp | 341 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
[all...] |
| LegalizeDAG.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 592 case ISD::SETUEQ:
639 case ISD::SETUEQ:
657 case ISD::SETUEQ:
838 case ISD::SETUEQ:
[all...] |
| PPCISelLowering.cpp | 343 setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand);
344 setCondCodeAction(ISD::SETUEQ, MVT::f64, Expand);
528 setCondCodeAction(ISD::SETUEQ, MVT::v4f32, Expand);
563 setCondCodeAction(ISD::SETUEQ, MVT::v2f64, Expand);
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ISelLowering.cpp | 449 case ISD::SETUEQ:
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/R600/ |
| SIISelLowering.cpp | 59 setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand);
66 setCondCodeAction(ISD::SETUEQ, MVT::f64, Expand);
[all...] |
| AMDGPUISelLowering.cpp | [all...] |
| R600ISelLowering.cpp | 52 setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | [all...] |
| MipsISelLowering.cpp | 487 case ISD::SETUEQ: return Mips::FCOND_UEQ;
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
