/external/llvm/include/llvm/CodeGen/ |
ResourcePriorityQueue.h | 31 struct resource_sort : public std::binary_function<SUnit*, SUnit*, bool> { 35 bool operator()(const SUnit* left, const SUnit* right) const; 40 std::vector<SUnit> *SUnits; 49 std::vector<SUnit*> Queue; 71 std::vector<SUnit*> Packet; 86 void initNodes(std::vector<SUnit> &sunits) override; 88 void addNode(const SUnit *SU) override { 92 void updateNode(const SUnit *SU) override { [all...] |
LatencyPriorityQueue.h | 25 struct latency_sort : public std::binary_function<SUnit*, SUnit*, bool> { 29 bool operator()(const SUnit* left, const SUnit* right) const; 34 std::vector<SUnit> *SUnits; 43 std::vector<SUnit*> Queue; 52 void initNodes(std::vector<SUnit> &sunits) override { 57 void addNode(const SUnit *SU) override { 61 void updateNode(const SUnit *SU) override { 80 void push(SUnit *U) override [all...] |
ScheduleHazardRecognizer.h | 20 class SUnit; 60 virtual HazardType getHazardType(SUnit *m, int Stalls = 0) { 71 virtual void EmitInstruction(SUnit *) {} 78 virtual unsigned PreEmitNoops(SUnit *) { 85 virtual bool ShouldPreferAnother(SUnit *) {
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ScheduleDAG.h | 28 class SUnit; 74 /// Dep - A pointer to the depending/depended-on SUnit, and an enum 76 PointerIntPair<SUnit *, 2, Kind> Dep; 101 SDep(SUnit *S, Kind kind, unsigned Reg) 119 SDep(SUnit *S, OrderKind kind) 159 //// getSUnit - Return the SUnit to which this edge points. 160 SUnit *getSUnit() const { 164 //// setSUnit - Assign the SUnit to which this edge points. 165 void setSUnit(SUnit *SU) { 254 /// SUnit - Scheduling unit. This is a node in the scheduling DAG [all...] |
ScheduleDAGInstrs.h | 33 /// An individual mapping from virtual register number to SUnit. 36 SUnit *SU; 38 VReg2SUnit(unsigned reg, SUnit *su): VirtReg(reg), SU(su) {} 48 SUnit *SU; 52 PhysRegSUOper(SUnit *su, int op, unsigned R): SU(su), OpIdx(op), Reg(R) {} 118 /// scheduling region is mapped to an SUnit. 119 DenseMap<MachineInstr*, SUnit*> MISUnitMap; 142 std::vector<SUnit *> PendingLoads; 173 /// \brief Resolve and cache a resolved scheduling class for an SUnit. 174 const MCSchedClassDesc *getSchedClass(SUnit *SU) const [all...] |
MachineScheduler.h | 193 virtual SUnit *pickNode(bool &IsTopNode) = 0; 200 virtual void schedNode(SUnit *SU, bool IsTopNode) = 0; 204 virtual void releaseTopNode(SUnit *SU) = 0; 207 virtual void releaseBottomNode(SUnit *SU) = 0; 242 const SUnit *NextClusterPred; 243 const SUnit *NextClusterSucc; 279 bool canAddEdge(SUnit *SuccSU, SUnit *PredSU); 286 bool addEdge(SUnit *SuccSU, const SDep &PredDep); 307 const SUnit *getNextClusterPred() const { return NextClusterPred; [all...] |
DFAPacketizer.h | 41 class SUnit; 107 std::map<MachineInstr*, SUnit*> MIToSUnit; 154 virtual bool isLegalToPacketizeTogether(SUnit *SUI, SUnit *SUJ) { 160 virtual bool isLegalToPruneDependencies(SUnit *SUI, SUnit *SUJ) {
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ScoreboardHazardRecognizer.h | 28 class SUnit; 117 HazardType getHazardType(SUnit *SU, int Stalls) override; 119 void EmitInstruction(SUnit *SU) override;
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ScheduleDFS.h | 26 class SUnit; 71 /// \brief Per-SUnit data computed during DFS for various metrics. 102 /// DFS results for each SUnit in this DAG. 142 void compute(ArrayRef<SUnit> SUnits); 146 unsigned getNumInstrs(const SUnit *SU) const { 159 ILPValue getILP(const SUnit *SU) const { 170 unsigned getSubtreeID(const SUnit *SU) const {
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/external/llvm/lib/Target/R600/ |
R600MachineScheduler.h | 54 std::vector<SUnit *> Available[IDLast], Pending[IDLast]; 55 std::vector<SUnit *> AvailableAlus[AluLast]; 56 std::vector<SUnit *> PhysicalRegCopy; 77 SUnit *pickNode(bool &IsTopNode) override; 78 void schedNode(SUnit *SU, bool IsTopNode) override; 79 void releaseTopNode(SUnit *SU) override; 80 void releaseBottomNode(SUnit *SU) override; 86 int getInstKind(SUnit *SU); 88 AluKind getAluKind(SUnit *SU) const; 91 SUnit *AttemptFillSlot (unsigned Slot, bool AnyAlu) [all...] |
R600MachineScheduler.cpp | 46 void R600SchedStrategy::MoveUnits(std::vector<SUnit *> &QSrc, 47 std::vector<SUnit *> &QDst) 59 SUnit* R600SchedStrategy::pickNode(bool &IsTopNode) { 60 SUnit *SU = nullptr; 132 const SUnit &S = DAG->SUnits[i]; 142 void R600SchedStrategy::schedNode(SUnit *SU, bool IsTopNode) { 190 void R600SchedStrategy::releaseTopNode(SUnit *SU) { 194 void R600SchedStrategy::releaseBottomNode(SUnit *SU) { 220 R600SchedStrategy::AluKind R600SchedStrategy::getAluKind(SUnit *SU) const { 294 int R600SchedStrategy::getInstKind(SUnit* SU) [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCHazardRecognizers.h | 28 SmallVector<SUnit *, 7> CurGroup; 31 bool isLoadAfterStore(SUnit *SU); 32 bool isBCTRAfterSet(SUnit *SU); 40 HazardType getHazardType(SUnit *SU, int Stalls) override; 41 bool ShouldPreferAnother(SUnit* SU) override; 42 unsigned PreEmitNoops(SUnit *SU) override; 43 void EmitInstruction(SUnit *SU) override; 79 virtual HazardType getHazardType(SUnit *SU, int Stalls) override; 80 virtual void EmitInstruction(SUnit *SU) override;
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/external/llvm/lib/CodeGen/ |
LatencyPriorityQueue.cpp | 23 bool latency_sort::operator()(const SUnit *LHS, const SUnit *RHS) const { 56 SUnit *LatencyPriorityQueue::getSingleUnscheduledPred(SUnit *SU) { 57 SUnit *OnlyAvailablePred = nullptr; 58 for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); 60 SUnit &Pred = *I->getSUnit(); 73 void LatencyPriorityQueue::push(SUnit *SU) { 77 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); 92 void LatencyPriorityQueue::scheduledNode(SUnit *SU) [all...] |
ScheduleDAGPrinter.cpp | 43 static bool isNodeHidden(const SUnit *Node) { 47 static bool hasNodeAddressLabel(const SUnit *Node, 54 static std::string getEdgeAttributes(const SUnit *Node, 65 std::string getNodeLabel(const SUnit *Node, const ScheduleDAG *Graph); 66 static std::string getNodeAttributes(const SUnit *N, 78 std::string DOTGraphTraits<ScheduleDAG*>::getNodeLabel(const SUnit *SU,
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ScheduleDAG.cpp | 53 EntrySU = SUnit(); 54 ExitSU = SUnit(); 66 bool SUnit::addPred(const SDep &D, bool Required) { 77 SUnit *PredSU = I->getSUnit(); 96 SUnit *N = D.getSUnit(); 134 void SUnit::removePred(const SDep &D) { 142 SUnit *N = D.getSUnit(); 179 void SUnit::setDepthDirty() { 181 SmallVector<SUnit*, 8> WorkList; 184 SUnit *SU = WorkList.pop_back_val() [all...] |
ScheduleDAGInstrs.cpp | 252 void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) { 264 SUnit *UseSU = I->SU; 293 /// this SUnit to following instructions in the same scheduling region that 295 void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) { 311 SUnit *DefSU = I->SU; 333 // Push this SUnit on the use list. 370 /// addVRegDefDeps - Add register output and data dependencies from this SUnit 376 void ScheduleDAGInstrs::addVRegDefDeps(SUnit *SU, unsigned OperIdx) { 397 SUnit *DefSU = DefI->SU; 409 /// defines the virtual register used at OperIdx is mapped to an SUnit. Add [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
ScheduleDAGSDNodes.h | 30 /// nodes into a single SUnit so that they are scheduled together. 42 /// The schedule. Null SUnit*'s represent noop instructions. 43 std::vector<SUnit*> Sequence; 73 /// NewSUnit - Creates a new SUnit and return a ptr to it. 75 SUnit *newSUnit(SDNode *N); 77 /// Clone - Creates a clone of the specified SUnit. It does not copy the 80 SUnit *Clone(SUnit *N); 82 /// BuildSchedGraph - Build the SUnit graph from the selection dag that we 83 /// are input. This SUnit graph is similar to the SelectionDAG, bu [all...] |
ScheduleDAGVLIW.cpp | 61 std::vector<SUnit*> PendingQueue; 88 void releaseSucc(SUnit *SU, const SDep &D); 89 void releaseSuccessors(SUnit *SU); 90 void scheduleNodeTopDown(SUnit *SU, unsigned CurCycle); 117 void ScheduleDAGVLIW::releaseSucc(SUnit *SU, const SDep &D) { 118 SUnit *SuccSU = D.getSUnit(); 141 void ScheduleDAGVLIW::releaseSuccessors(SUnit *SU) { 143 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); 155 void ScheduleDAGVLIW::scheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { 187 std::vector<SUnit*> NotReady [all...] |
ResourcePriorityQueue.cpp | 72 ResourcePriorityQueue::numberRCValPredInSU(SUnit *SU, unsigned RCId) { 74 for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); 79 SUnit *PredSU = I->getSUnit(); 109 unsigned ResourcePriorityQueue::numberRCValSuccInSU(SUnit *SU, 112 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); 117 SUnit *SuccSU = I->getSUnit(); 147 static unsigned numberCtrlDepsInSU(SUnit *SU) { 149 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); 157 static unsigned numberCtrlPredInSU(SUnit *SU) { 159 for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end() [all...] |
ScheduleDAGFast.cpp | 49 SmallVector<SUnit *, 16> Queue; 53 void push(SUnit *U) { 57 SUnit *pop() { 59 SUnit *V = Queue.back(); 77 std::vector<SUnit*> LiveRegDefs; 86 /// AddPred - adds a predecessor edge to SUnit SU. 88 void AddPred(SUnit *SU, const SDep &D) { 92 /// RemovePred - removes a predecessor edge from SUnit SU. 94 void RemovePred(SUnit *SU, const SDep &D) { 99 void ReleasePred(SUnit *SU, SDep *PredEdge) [all...] |
ScheduleDAGRRList.cpp | 125 std::vector<SUnit*> PendingQueue; 144 std::vector<SUnit*> LiveRegDefs; 145 std::vector<SUnit*> LiveRegGens; 148 // Each interference is an SUnit and set of physical registers. 149 SmallVector<SUnit*, 4> Interferences; 150 typedef DenseMap<SUnit*, SmallVector<unsigned, 4> > LRegsMapT; 159 DenseMap<SUnit*, SUnit*> CallSeqEndForStart; 187 bool IsReachable(const SUnit *SU, const SUnit *TargetSU) [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonMachineScheduler.h | 51 std::vector<SUnit*> Packet; 87 bool isResourceAvailable(SUnit *SU); 88 bool reserveResources(SUnit *SU); 114 // The best SUnit candidate. 115 SUnit *SU; 176 bool checkHazard(SUnit *SU); 178 void releaseNode(SUnit *SU, unsigned ReadyCycle); 182 void bumpNode(SUnit *SU); 186 void removeReady(SUnit *SU); 188 SUnit *pickOnlyChoice() [all...] |
HexagonMachineScheduler.cpp | 25 SUnit* LastSequentialCall = nullptr; 43 bool VLIWResourceModel::isResourceAvailable(SUnit *SU) { 68 for (SUnit::const_succ_iterator I = Packet[i]->Succs.begin(), 83 bool VLIWResourceModel::reserveResources(SUnit *SU) { 156 SmallVector<SUnit*, 8> TopRoots, BotRoots; 164 // FIXME: SUnit::dumpAll always recompute depth and height now. The max 182 while (SUnit *SU = SchedImpl->pickNode(IsTopNode)) { 223 void ConvergingVLIWScheduler::releaseTopNode(SUnit *SU) { 227 for (SUnit::succ_iterator I = SU->Preds.begin(), E = SU->Preds.end(); 240 void ConvergingVLIWScheduler::releaseBottomNode(SUnit *SU) [all...] |
/external/llvm/lib/Target/ARM/ |
ARMHazardRecognizer.h | 40 HazardType getHazardType(SUnit *SU, int Stalls) override; 42 void EmitInstruction(SUnit *SU) override;
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/external/llvm/include/llvm/Target/ |
TargetSubtargetInfo.h | 25 class SUnit; 91 virtual void adjustSchedDependency(SUnit *def, SUnit *use,
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