/external/chromium_org/v8/src/arm64/ |
regexp-macro-assembler-arm64.cc | 220 __ Add(x10, input_end(), Operand(current_input_offset(), SXTW)); 231 __ Add(x10, input_end(), Operand(current_input_offset(), SXTW)); 257 Operand(current_input_offset(), SXTW)); 321 Operand(capture_start_offset, SXTW)); 324 Operand(capture_length, SXTW)); 327 Operand(current_input_offset(), SXTW)); 362 __ Cmp(current_input_offset().X(), Operand(current_input_offset(), SXTW)); 384 __ Add(x0, input_end(), Operand(capture_start_offset, SXTW)); 388 __ Add(x1, input_end(), Operand(current_input_offset(), SXTW)); 440 __ Add(capture_start_address, input_end(), Operand(w10, SXTW)); [all...] |
codegen-arm64.cc | 493 __ Ldrh(result, MemOperand(string, index, SXTW, 1)); 497 __ Ldrb(result, MemOperand(string, index, SXTW));
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lithium-codegen-arm64.cc | [all...] |
assembler-arm64-inl.h | 475 DCHECK((extend == UXTW) || (extend == SXTW) || (extend == SXTX)); 528 DCHECK((extend_ == UXTW) || (extend_ == SXTW) || (extend_ == SXTX)); [all...] |
constants-arm64.h | 348 SXTW = 6, [all...] |
simulator-arm64.cc | 938 case SXTW: [all...] |
assembler-arm64.cc | [all...] |
/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
AArch64AddressingModes.h | 47 SXTW, 66 case AArch64_AM::SXTW: return "sxtw"; 133 case 6: return AArch64_AM::SXTW; 149 /// 110 ==> sxtw 160 case AArch64_AM::SXTW: return 6; break; 196 /// 110 ==> sxtw
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/external/chromium_org/v8/test/cctest/ |
test-disasm-arm64.cc | 125 COMPARE(dci(0x93407c00), "sxtw x0, w0"); 145 COMPARE(Mov(x16, Operand(x20, SXTW, 3)), "sbfiz x16, x20, #3, #32"); 385 COMPARE(add(x24, x25, Operand(x26, SXTW, 1)), "add x24, x25, w26, sxtw #1"); 411 COMPARE(sub(x24, x25, Operand(x26, SXTW, 1)), "sub x24, x25, w26, sxtw #1"); 522 COMPARE(sxtw(x8, x9), "sxtw x8, w9"); 525 COMPARE(sxtw(x4, w5), "sxtw x4, w5") [all...] |
test-assembler-arm64.cc | 310 __ Mvn(x15, Operand(w2, SXTW, 4)); 568 __ Orr(x12, x0, Operand(x1, SXTW, 2)); 665 __ Orn(x12, x0, Operand(x1, SXTW, 2)); 734 __ And(x12, x0, Operand(x1, SXTW, 2)); 875 __ Bic(x12, x0, Operand(x1, SXTW, 2)); 1003 __ Eor(x12, x0, Operand(x1, SXTW, 2)); 1072 __ Eon(x12, x0, Operand(x1, SXTW, 2)); [all...] |
/external/vixl/test/ |
test-disasm-a64.cc | 101 COMPARE(dci(0x93407c00), "sxtw x0, w0"); 120 COMPARE(Mov(x16, Operand(x17, SXTW, 3)), "sbfiz x16, x17, #3, #32"); 346 COMPARE(add(x24, x25, Operand(x26, SXTW, 1)), "add x24, x25, w26, sxtw #1"); 372 COMPARE(sub(x24, x25, Operand(x26, SXTW, 1)), "sub x24, x25, w26, sxtw #1"); 491 COMPARE(sxtw(x8, x9), "sxtw x8, w9"); 494 COMPARE(sxtw(x4, w5), "sxtw x4, w5") [all...] |
test-assembler-a64.cc | 275 __ Mvn(x15, Operand(w2, SXTW, 4)); 527 __ Orr(x12, x0, Operand(x1, SXTW, 2)); 616 __ Orn(x12, x0, Operand(x1, SXTW, 2)); 683 __ And(x12, x0, Operand(x1, SXTW, 2)); 821 __ Bic(x12, x0, Operand(x1, SXTW, 2)); 945 __ Eor(x12, x0, Operand(x1, SXTW, 2)); 1012 __ Eon(x12, x0, Operand(x1, SXTW, 2)); [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonPeephole.cpp | 11 // %vreg170<def> = SXTW %vreg166 31 // %vreg170<def> = SXTW %vreg166 or %vreg16<def> = NOT_p %vreg15<kill> 137 // %vreg170<def> = SXTW %vreg166 138 if (!DisableOptSZExt && MI->getOpcode() == Hexagon::SXTW) { 148 // %vreg170<def> = SXTW %vreg166
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HexagonISelDAGToDAG.cpp | 456 SDNode *Result_2 = CurDAG->getMachineNode(Hexagon::SXTW, dl, MVT::i64, 477 SDNode *Result_2 = CurDAG->getMachineNode(Hexagon::SXTW, dl, [all...] |
/external/chromium_org/v8/src/compiler/arm64/ |
code-generator-arm64.cc | 60 SXTW); 304 __ Sxtw(i.OutputRegister(), i.InputRegister32(0)); 445 __ Add(index, object, Operand(index, SXTW));
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/external/vixl/src/a64/ |
simulator-a64.cc | 350 case SXTW: 764 VIXL_ASSERT((ext == UXTW) || (ext == UXTX) || (ext == SXTW) || (ext == SXTX)); 807 set_xreg(srcdst, ExtendValue(kXRegSize, MemoryRead32(address), SXTW)); 874 set_xreg(rt, ExtendValue(kXRegSize, MemoryRead32(address), SXTW)); 876 MemoryRead32(address + kWRegSizeInBytes), SXTW)); [all...] |
assembler-a64.cc | 285 VIXL_ASSERT((extend == UXTW) || (extend == SXTW) || (extend == SXTX)); 336 VIXL_ASSERT((extend_ == UXTW) || (extend_ == SXTW) || (extend_ == SXTX)); [all...] |
constants-a64.h | 238 SXTW = 6, [all...] |
/external/llvm/lib/Target/AArch64/AsmParser/ |
AArch64AsmParser.cpp | 953 ET == AArch64_AM::UXTW || ET == AArch64_AM::SXTW || 988 return (ET == AArch64_AM::UXTW || ET == AArch64_AM::SXTW) && [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelDAGToDAG.cpp | 356 return AArch64_AM::SXTW; 691 SignExtend = CurDAG->getTargetConstant(Ext == AArch64_AM::SXTW, MVT::i32); 761 SignExtend = CurDAG->getTargetConstant(Ext == AArch64_AM::SXTW, MVT::i32); 772 SignExtend = CurDAG->getTargetConstant(Ext == AArch64_AM::SXTW, MVT::i32); [all...] |
/external/llvm/lib/Target/AArch64/Utils/ |
AArch64BaseInfo.h | 465 SXTW, [all...] |