| /art/runtime/arch/arm64/ |
| registers_arm64.h | 49 X22 = 22,
|
| quick_method_frame_info_arm64.h | 36 (1 << art::arm64::X20) | (1 << art::arm64::X21) | (1 << art::arm64::X22) |
|
| /art/compiler/jni/quick/arm64/ |
| calling_convention_arm64.cc | 159 callee_save_regs_.push_back(Arm64ManagedRegister::FromCoreRegister(X22));
181 return 1 << X20 | 1 << X21 | 1 << X22 | 1 << X23 | 1 << X24 | 1 << X25 |
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AsmBackend.cpp | 421 // X21/X22 pair = 0x00000002,
431 else if (Reg1 == AArch64::X21 && Reg2 == AArch64::X22 &&
|
| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| PPCDisassembler.cpp | 166 PPC::X20, PPC::X21, PPC::X22, PPC::X23,
|
| /art/compiler/utils/arm64/ |
| assembler_arm64.cc | 675 StoreToOffset(X22, SP, reg_offset);
746 LoadFromOffset(X22, SP, reg_offset);
|
| managed_register_arm64_test.cc | [all...] |
| /external/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.h | 53 case AArch64::X22: return AArch64::W22;
93 case AArch64::W22: return AArch64::X22;
[all...] |
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 63 PPC::X20, PPC::X21, PPC::X22, PPC::X23,
74 PPC::X20, PPC::X21, PPC::X22, PPC::X23,
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 162 {PPC::X22, -80},
[all...] |
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64Disassembler.cpp | 374 AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24,
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ddk/ |
| scsi.h | 433 #define SCSIMESS_ORDERED_QUEUE_TAG 0X22
490 #define SCSISTAT_COMMAND_TERMINATED 0x22
[all...] |
| /external/valgrind/main/memcheck/ |
| mc_machine.c | [all...] |
