/external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
armSP_FFT_CToC_SC16_Radix8_fs_unsafe_s.S | 191 #define dT0 D0.S16 306 VMOV dT0[0],t0 329 VQRDMULH dT1,dVr5,dT0[0] @// use dVi0 for dT1 331 VQRDMULH dVi5,dVi5,dT0[0] 340 VQRDMULH dT1,dVr7,dT0[0] 341 VQRDMULH dVi7,dVi7,dT0[0] 368 VQRDMULH dT1,dVr7,dT0[0] 370 VQRDMULH dVi7,dVi7,dT0[0] 379 VQRDMULH dT1,dVr5,dT0[0] @// use dVi0 for dT1 380 VQRDMULH dVi5,dVi5,dT0[0 [all...] |
armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S | 187 #define dT0 D14.S32 297 VMOV dT0[0],t0 320 VQRDMULH dT1,dVr5,dT0[0] @// use dVi0 for dT1 322 VQRDMULH dVi5,dVi5,dT0[0] 331 VQRDMULH dT1,dVr7,dT0[0] 332 VQRDMULH dVi7,dVi7,dT0[0] 359 VQRDMULH dT1,dVr7,dT0[0] 361 VQRDMULH dVi7,dVi7,dT0[0] 370 VQRDMULH dT1,dVr5,dT0[0] @// use dVi0 for dT1 371 VQRDMULH dVi5,dVi5,dT0[0 [all...] |
armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S | 101 #define dT0 D8.F32 218 VADD dT0,dX0r,dX1r @// a+c 225 VMUL dT0, dT0, half[0] 244 VADD dY1r,dT0,dX1i @// F(N/2 -1) 251 VADD dY0r,dT0,dX0i @// F(1)
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armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe_s.S | 108 #define dT0 D8.S32 223 VHADD dT0,dX0r,dX1r @// a+c 245 VHADD dY1r,dT0,dX1i @// F(N/2 -1) 248 VADD dY1r,dT0,dX1i @// F(N/2 -1) 262 VHADD dY0r,dT0,dX0i @// F(1) 265 VADD dY0r,dT0,dX0i @// F(1)
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armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S | 173 #define dT0 D14.F32 284 VMOV dT0[0], t0 308 VMUL dT1,dVr5,dT0[0] @// use dVi0 for dT1 311 VMUL dVi5,dVi5,dT0[0] 320 VMUL dT1,dVr7,dT0[0] 321 VMUL dVi7,dVi7,dT0[0] 352 VMUL dT1,dVr7,dT0[0] 354 VMUL dVi7,dVi7,dT0[0] 363 VMUL dT1,dVr5,dT0[0] @// use dVi0 for dT1 364 VMUL dVi5,dVi5,dT0[0 [all...] |
omxSP_FFTFwd_RToCCS_F32_Sfs_s.S | 102 #define dT0 d6.f32 328 VADD dT0,dX0r,dX1r @// a+c 331 VMUL dT0,dT0,half[0] 352 VSUB dY1r,dT0,dX1i @// F(N/2 -1) 363 VSUB dY0r,dT0,dX0i @// F(1)
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omxSP_FFTFwd_RToCCS_S32_Sfs_s.S | 116 #define dT0 d6.s32 470 VADD dT0,dX0r,dX1r @// a+c 472 VHADD dT0,dT0,dzero 493 VSUB dY1r,dT0,dX1i @// F(N/2 -1) 505 VSUB dY0r,dT0,dX0i @// F(1)
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armSP_FFTInv_CCSToR_S16_preTwiddleRadix2_unsafe_s.S | 93 #define dT0 D8.S16 199 VHADD dT0,dX0r,dX1r @ a+c 225 VHADD dY1r,dT0,dX1i @ F(N/2 -1) 228 VADD dY1r,dT0,dX1i @ F(N/2 -1) 233 VHADD dY0r,dT0,dX0i @ F(1) 236 VADD dY0r,dT0,dX0i @ F(1) 326 VHADD dT0,dX0r,dX1r @ a+c 345 VHADD dY1r,dT0,dX1i @ F(N/2 -1) 348 VADD dY1r,dT0,dX1i @ F(N/2 -1) 359 VHADD dY0r,dT0,dX0i @ F(1 [all...] |
omxSP_FFTFwd_RToCCS_S16_Sfs_s.S | 103 #define dT0 d6.s16 482 VHADD dT0,dX0r,dX1r @ (a+c)/2 501 VSUB dY1r,dT0,dX1i @ F(N/2 -1) 502 VSUB dY0r,dT0,dX0i @ F(1) 576 VADD dT0,dX0r,dX1r @ a+c 578 VHADD dT0,dT0,dzero 597 VSUB dY1r,dT0,dX1i @ F(N/2 -1) 607 VSUB dY0r,dT0,dX0i @ F(1)
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omxSP_FFTInv_CCSToR_F32_Sfs_s.S | 110 #define dT0 D8.F32
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omxSP_FFTInv_CCSToR_S32_Sfs_s.S | 127 #define dT0 D8.S32
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omxSP_FFTInv_CCSToR_S16_Sfs_s.S | 100 #define dT0 D8.S32
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/external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/arm64/ |
ComplexToRealFixup.S | 77 #define dT0 v6.2s 185 fadd dT0,dX0r,dX1r // a+c 188 fmul dT0,dT0,half[0] 214 fsub dY1r,dT0,dX1i // F(N/2 -1) 225 fsub dY0r,dT0,dX0i // F(1)
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armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_s.S | 92 #define dT0 v8.2s 200 fadd dT0,dX0r,dX1r // a+c 207 fmul dT0, dT0, half[0] 231 fadd dY1r,dT0,dX1i // F(N/2 -1) 238 fadd dY0r,dT0,dX0i // F(1)
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armSP_FFT_CToC_FC32_Radix8_fs_s.S | 173 #define dT0 v14.2s 355 fmul dT1,dVr5,dT0[0] // use dVi0 for dT1 358 fmul dVi5,dVi5,dT0[0] 367 fmul dT1,dVr7,dT0[0] 368 fmul dVi7,dVi7,dT0[0] 402 fmul dT1,dVr7,dT0[0] 404 fmul dVi7,dVi7,dT0[0] 413 fmul dT1,dVr5,dT0[0] // use dVi0 for dT1 414 fmul dVi5,dVi5,dT0[0]
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