| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips32r2.s | 8 madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 nmadd.d $f18,$f9,$f14,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 nmsub.s $f1,$f24,$f19,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips5.s | 8 luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips4.s | 11 swxc1 $f19,$12($k0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/compiler-rt/lib/builtins/ppc/ |
| restFP.S | 28 lfd f19,-104(r1)
|
| saveFP.S | 26 stfd f19,-104(r1)
|
| /external/llvm/test/MC/Mips/mips4/ |
| invalid-mips5.s | 8 luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips64r2.s | 17 luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
20 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
26 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
32 nmsub.s $f1,$f24,$f19,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips32/ |
| invalid-mips32r2.s | 13 luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
19 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
21 nmadd.d $f18,$f9,$f14,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
24 nmsub.s $f1,$f24,$f19,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
33 swxc1 $f19,$t4($k0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| fpregdef.h | 47 #define ft5f $f19
79 #define fa7 $f19
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
| fpregdef.h | 47 #define ft5f $f19
79 #define fa7 $f19
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
| fpregdef.h | 47 #define ft5f $f19
79 #define fa7 $f19
|
| /prebuilts/ndk/9/platforms/android-12/arch-mips/usr/include/asm/ |
| fpregdef.h | 47 #define ft5f $f19
79 #define fa7 $f19
|
| /prebuilts/ndk/9/platforms/android-13/arch-mips/usr/include/asm/ |
| fpregdef.h | 47 #define ft5f $f19
79 #define fa7 $f19
|
| /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
| fpregdef.h | 47 #define ft5f $f19
79 #define fa7 $f19
|
| /prebuilts/ndk/9/platforms/android-15/arch-mips/usr/include/asm/ |
| fpregdef.h | 47 #define ft5f $f19
79 #define fa7 $f19
|
| /prebuilts/ndk/9/platforms/android-16/arch-mips/usr/include/asm/ |
| fpregdef.h | 47 #define ft5f $f19
79 #define fa7 $f19
|
| /prebuilts/ndk/9/platforms/android-17/arch-mips/usr/include/asm/ |
| fpregdef.h | 47 #define ft5f $f19
79 #define fa7 $f19
|
| /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
| fpregdef.h | 47 #define ft5f $f19
79 #define fa7 $f19
|
| /prebuilts/ndk/9/platforms/android-19/arch-mips/usr/include/asm/ |
| fpregdef.h | 47 #define ft5f $f19
79 #define fa7 $f19
|
| /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/ |
| fpregdef.h | 47 #define ft5f $f19
79 #define fa7 $f19
|
| /external/llvm/test/MC/Mips/mips64/ |
| invalid-mips64r2.s | 17 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
19 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
22 nmsub.s $f1,$f24,$f19,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips5.s | 11 luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/clang/test/CodeGen/ |
| function-attributes.c | 110 // CHECK-LABEL: define void @f19()
117 void f19(void) { function
|
| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips32r2.s | 19 luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
23 madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
24 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
48 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
53 nmadd.d $f18,$f9,$f14,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
56 nmsub.s $f1,$f24,$f19,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
65 swxc1 $f19,$t4($k0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 69 luxc1 $f19,$s6($s5)
78 madd.d $f18,$f19,$f26,$f20
79 madd.s $f1,$f31,$f19,$f25
106 msub.s $f12,$f19,$f10,$f16
125 nmadd.d $f18,$f9,$f14,$f19
128 nmsub.s $f1,$f24,$f19,$f4
181 swxc1 $f19,$12($k0)
|
