HomeSort by relevance Sort by last modified time
    Searched refs:multu (Results 1 - 25 of 31) sorted by null

1 2

  /external/openssl/crypto/bn/asm/
mips-mont.S 51 multu $12,$13
56 multu $10,$8
59 multu $16,$13
63 multu $14,$23
66 multu $18,$23
83 multu $12,$13
95 multu $14,$23
134 multu $12,$13
140 multu $10,$8
145 multu $16,$1
    [all...]
bn-mips.S 30 multu $12,$7
44 multu $14,$7
57 multu $8,$7
71 multu $10,$7
96 multu $12,$7
111 multu $12,$7
126 multu $12,$7
165 multu $12,$7
173 multu $14,$7
184 multu $8,$
    [all...]
  /external/llvm/test/MC/Mips/mips32r6/
invalid-mips1.s 21 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
22 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
invalid-mips2.s 17 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
18 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
  /external/llvm/test/MC/Mips/
mips-dsp-instructions.s 30 # CHECK: multu $ac2, $4, $5 # encoding: [0x00,0x85,0x10,0x19]
41 # CHECK: multu $4, $5 # encoding: [0x00,0x85,0x00,0x19]
78 multu $ac2, $4, $5
89 multu $4, $5
micromips-alu-instructions.s 38 # CHECK-EL: multu $9, $7 # encoding: [0xe9,0x00,0x3c,0x9b]
72 # CHECK-EB: multu $9, $7 # encoding: [0x00,0xe9,0x9b,0x3c]
104 multu $9, $7
mips-alu-instructions.s 87 # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
112 multu $3,$5
mips64-alu-instructions.s 83 # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
108 multu $3,$5
  /external/llvm/test/MC/Mips/mips64r6/
invalid-mips1.s 24 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
25 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
invalid-mips2.s 20 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
21 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
invalid-mips3.s 22 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
23 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
invalid-mips64.s 43 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
44 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
  /external/llvm/test/MC/Mips/mips1/
valid.s 69 multu $gp,$k0
70 multu $9,$s2
  /external/chromium_org/v8/test/cctest/
test-disasm-mips.cc 121 COMPARE(multu(a0, a1),
122 "00850019 multu a0, a1");
123 COMPARE(multu(t2, t3),
124 "014b0019 multu t2, t3");
125 COMPARE(multu(v0, v1),
126 "00430019 multu v0, v1");
test-disasm-mips64.cc 139 COMPARE(multu(a0, a1),
140 "00850019 multu a0, a1");
143 COMPARE(multu(a6, a7),
144 "014b0019 multu a6, a7");
147 COMPARE(multu(v0, v1),
148 "00430019 multu v0, v1");
  /external/llvm/test/MC/Mips/mips2/
valid.s 77 multu $gp,$k0
78 multu $9,$s2
  /external/llvm/test/MC/Mips/mips32/
valid.s 103 multu $gp,$k0
104 multu $9,$s2
  /external/llvm/test/MC/Mips/mips32r2/
valid.s 119 multu $gp,$k0
120 multu $9,$s2
  /external/pixman/pixman/
pixman-mips-dspr2-asm.h 663 multu $ac0, \wt1, \scratch1
673 multu $ac1, \wt1, \scratch1
685 multu $ac2, \wt1, \scratch1
697 multu $ac3, \wt1, \scratch1
  /external/llvm/test/MC/Mips/mips3/
valid.s 130 multu $gp,$k0
131 multu $9,$s2
  /external/llvm/test/MC/Mips/mips4/
valid.s 146 multu $gp,$k0
147 multu $9,$s2
  /external/llvm/test/MC/Mips/mips5/
valid.s 147 multu $gp,$k0
148 multu $9,$s2
  /external/llvm/test/MC/Mips/mips64/
valid.s 161 multu $gp,$k0
162 multu $9,$s2
  /external/llvm/test/MC/Mips/mips64r2/
valid.s 179 multu $gp,$k0
180 multu $9,$s2
  /external/chromium_org/v8/src/mips64/
disasm-mips64.cc 795 case MULTU: // @Mips64r6 == MUL_MUH_U.
797 Format(instr, "multu 'rs, 'rt");
    [all...]

Completed in 3967 milliseconds

1 2