/external/compiler-rt/lib/builtins/arm/ |
sync_fetch_and_add_4.S | 18 #define add_4(rD, rN, rM) add rD, rN, rM
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sync_fetch_and_and_4.S | 17 #define and_4(rD, rN, rM) and rD, rN, rM
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sync_fetch_and_nand_4.S | 17 #define nand_4(rD, rN, rM) bic rD, rN, rM
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sync_fetch_and_or_4.S | 17 #define or_4(rD, rN, rM) orr rD, rN, rM
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sync_fetch_and_sub_4.S | 18 #define sub_4(rD, rN, rM) sub rD, rN, rM
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sync_fetch_and_xor_4.S | 17 #define xor_4(rD, rN, rM) eor rD, rN, rM
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sync_fetch_and_max_4.S | 17 #define max_4(rD, rN, rM) MINMAX_4(rD, rN, rM, gt)
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sync_fetch_and_min_4.S | 17 #define min_4(rD, rN, rM) MINMAX_4(rD, rN, rM, lt)
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sync_fetch_and_umax_4.S | 17 #define umax_4(rD, rN, rM) MINMAX_4(rD, rN, rM, hi)
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sync_fetch_and_umin_4.S | 17 #define umin_4(rD, rN, rM) MINMAX_4(rD, rN, rM, lo)
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sync-ops.h | 47 #define MINMAX_4(rD, rN, rM, cmp_kind) \ 48 cmp rN, rM ; \ 51 mov##cmp_kind rD, rN
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/external/lzma/Asm/x86/ |
7zCrcOpt.asm | 9 rN equ r7
21 SRCDAT equ rN + rD + 4 *
42 dec rN
49 mov rN, num_VAR
51 test rN, rN
59 cmp rN, 16
61 add rN, rD
62 mov num_VAR, rN
63 sub rN, 8 [all...] |
AesOpt.asm | 19 rN equ r0
31 mov rN, num
107 sub rN, ways
110 add rN, ways
124 sub rN, 1
161 sub rN, 1
215 sub rN, ways
218 add rN, ways
231 sub rN, 1
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/external/valgrind/main/VEX/priv/ |
guest_arm_toIR.c | [all...] |
host_arm64_defs.c | 415 //ZZ ARMAModeN *mkARMAModeN_RR ( HReg rN, HReg rM ) { 418 //ZZ am->ARMamN.RR.rN = rN; 423 //ZZ ARMAModeN *mkARMAModeN_R ( HReg rN ) { 426 //ZZ am->ARMamN.R.rN = rN; 432 //ZZ addHRegUse(u, HRmRead, am->ARMamN.R.rN); 434 //ZZ addHRegUse(u, HRmRead, am->ARMamN.RR.rN); 441 //ZZ am->ARMamN.R.rN = lookupHRegRemap(m, am->ARMamN.R.rN); [all...] |
host_arm64_defs.h | 784 HReg rN; 791 HReg rN; 798 HReg rN; // address 1061 extern ARM64Instr* ARM64Instr_VLdStS ( Bool isLoad, HReg sD, HReg rN, 1063 extern ARM64Instr* ARM64Instr_VLdStD ( Bool isLoad, HReg dD, HReg rN, 1065 extern ARM64Instr* ARM64Instr_VLdStQ ( Bool isLoad, HReg rQ, HReg rN ); [all...] |
host_arm_defs.c | 379 ARMAModeN *mkARMAModeN_RR ( HReg rN, HReg rM ) { 382 am->ARMamN.RR.rN = rN; 387 ARMAModeN *mkARMAModeN_R ( HReg rN ) { 390 am->ARMamN.R.rN = rN; 396 addHRegUse(u, HRmRead, am->ARMamN.R.rN); 398 addHRegUse(u, HRmRead, am->ARMamN.RR.rN); 405 am->ARMamN.R.rN = lookupHRegRemap(m, am->ARMamN.R.rN); [all...] |
host_arm_defs.h | 212 HReg rN; 216 HReg rN; 939 /* Note: rD != rN */ 941 HReg rN; 1014 extern ARMInstr* ARMInstr_Add32 ( HReg rD, HReg rN, UInt imm32 );
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guest_arm64_toIR.c | [all...] |
host_arm64_isel.c | [all...] |
/external/chromium_org/third_party/skia/experimental/Intersection/ |
CubeRoot.cpp | 242 static double TestCubeRootf(const char* szName, cuberootfnf cbrt, double rA, double rB, int rN) 244 const int N = rN; 291 static double TestCubeRootd(const char* szName, cuberootfnd cbrt, double rA, double rB, int rN) 293 const int N = rN;
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/external/skia/experimental/Intersection/ |
CubeRoot.cpp | 242 static double TestCubeRootf(const char* szName, cuberootfnf cbrt, double rA, double rB, int rN) 244 const int N = rN; 291 static double TestCubeRootd(const char* szName, cuberootfnd cbrt, double rA, double rB, int rN) 293 const int N = rN;
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/external/valgrind/main/none/tests/arm/ |
vfp.stdout.exp | [all...] |
/external/chromium_org/third_party/x86inc/ |
x86inc.asm | 144 ; rN and rNq are the native-size register holding function argument N
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/external/chromium_org/third_party/libvpx/source/libvpx/third_party/libyuv/source/ |
x86inc.asm | 127 ; rN and rNq are the native-size register holding function argument N
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