/external/llvm/test/MC/Mips/ |
micromips-shift-instructions.s | 17 # CHECK-EL: rotrv $9, $6, $7 # encoding: [0xc7,0x00,0xd0,0x48] 28 # CHECK-EB: rotrv $9, $6, $7 # encoding: [0x00,0xc7,0x48,0xd0] 36 rotrv $9, $6, $7
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mips-alu-instructions.s | 20 # CHECK: rotrv $9, $6, $7 # encoding: [0x46,0x48,0xe6,0x00] 51 rotrv $9, $6, $7
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mips64-alu-instructions.s | 18 # CHECK: rotrv $9, $6, $7 # encoding: [0x46,0x48,0xe6,0x00] 46 rotrv $9, $6, $7
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/external/chromium_org/v8/test/cctest/ |
test-disasm-mips.cc | 365 COMPARE(rotrv(a0, a1, a2), 366 "00c52046 rotrv a0, a1, a2"); 367 COMPARE(rotrv(s0, s1, s2), 368 "02518046 rotrv s0, s1, s2"); 369 COMPARE(rotrv(t2, t3, t4), 370 "018b5046 rotrv t2, t3, t4"); 371 COMPARE(rotrv(v0, v1, fp), 372 "03c31046 rotrv v0, v1, fp");
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test-disasm-mips64.cc | 510 COMPARE(rotrv(a0, a1, a2), 511 "00c52046 rotrv a0, a1, a2"); 512 COMPARE(rotrv(s0, s1, s2), 513 "02518046 rotrv s0, s1, s2"); 514 COMPARE(rotrv(a6, a7, t0), 515 "018b5046 rotrv a6, a7, t0"); 516 COMPARE(rotrv(v0, v1, fp), 517 "03c31046 rotrv v0, v1, fp");
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/external/llvm/test/MC/Mips/mips64/ |
invalid-mips64r2.s | 26 rotrv $1,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/llvm/test/MC/Mips/mips32/ |
invalid-mips32r2.s | 28 rotrv $1,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/llvm/test/MC/Mips/mips32r2/ |
valid.s | 138 rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46]
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/external/llvm/test/MC/Mips/mips5/ |
invalid-mips64r2.s | 40 rotrv $1,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/llvm/test/MC/Mips/mips64r2/ |
valid.s | 196 rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46]
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/external/llvm/test/MC/Mips/mips2/ |
invalid-mips32r2.s | 60 rotrv $1,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/chromium_org/v8/src/mips/ |
assembler-mips.h | 790 void rotrv(Register rd, Register rt, Register rs); [all...] |
assembler-mips.cc | 1645 void Assembler::rotrv(Register rd, Register rt, Register rs) { function in class:v8::Assembler [all...] |
macro-assembler-mips.cc | 931 rotrv(rd, rs, rt.rm()); [all...] |
/external/chromium_org/v8/src/mips64/ |
assembler-mips64.h | 802 void rotrv(Register rd, Register rt, Register rs); [all...] |
assembler-mips64.cc | 1709 void Assembler::rotrv(Register rd, Register rt, Register rs) { function in class:v8::Assembler [all...] |
macro-assembler-mips64.cc | 1008 rotrv(rd, rs, rt.rm()); [all...] |