| /art/compiler/dex/quick/arm64/ |
| arm64_lir.h | 103 #define A64_REG_IS_ZR(reg_num) ((reg_num) == rwzr || (reg_num) == rxzr)
140 rwzr = RegStorage::k32BitSolo | RegStorage::kCoreRegister | 0x3f, enumerator in enum:art::A64NativeRegisterPool
171 constexpr RegStorage rs_wzr(RegStorage::kValid | rwzr);
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| utility_arm64.cc | 113 return NewLIR2(kA64Fmov2sw, r_dest.GetReg(), rwzr);
419 res = NewLIR2(opcode, r_dest.GetReg(), rwzr);
444 res = NewLIR3(kA64Orr3Rrl, r_dest.GetReg(), rwzr, log_imm);
899 return NewLIR2(kA64Mov2rr | wide, r_dest.GetReg(), (is_wide) ? rxzr : rwzr);
913 return NewLIR2(kA64Mvn2rr | wide, r_dest.GetReg(), (is_wide) ? rxzr : rwzr);
[all...] |
| fp_arm64.cc | 304 NewLIR4(kA64Csel4rrrc, rl_result.reg.GetReg(), rwzr, rl_result.reg.GetReg(),
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| int_arm64.cc | 57 NewLIR4(kA64Csinc4rrrc, rl_result.reg.GetReg(), rwzr, rwzr, kArmCondEq);
781 NewLIR4(kA64Csinc4rrrc, rl_result.reg.GetReg(), rwzr, rwzr, kArmCondNe);
[all...] |
| target_arm64.cc | 429 if (LIKELY(operand != rwzr))
477 if (LIKELY(operand != rwzr && operand != rxzr)) {
[all...] |
