| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 217 { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i32, 1 },
218 { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i32, 1 },
246 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
247 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
271 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
272 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
278 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
279 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
281 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 2 },
282 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 }
[all...] |
| ARMISelDAGToDAG.cpp | [all...] |
| ARMISelLowering.cpp | 150 addTypeForNEON(VT, MVT::f64, MVT::v2i32);
428 addDRTypeForNEON(MVT::v2i32);
538 setOperationAction(ISD::CTPOP, MVT::v2i32, Custom);
570 MVT::v2i32};
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineValueType.h | 79 v2i32 = 33, // 2 x i32 enumerator in enum:llvm::MVT::SimpleValueType
205 SimpleTy == MVT::v2i32 || SimpleTy == MVT::v1i64 ||
288 case v2i32:
346 case v2i32:
400 case v2i32:
536 if (NumElements == 2) return MVT::v2i32;
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64TargetTransformInfo.cpp | 308 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
311 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
332 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
335 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
339 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f32, 1 },
342 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f32, 1 },
346 // Complex, from v2f32: legal type is v2i32 (no cost) or v2i64 (1 ext).
360 // Complex, from v2f64: legal type is v2i32, 1 narrowing => ~2.
361 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 2 },
364 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 }
[all...] |
| AArch64ISelDAGToDAG.cpp | 464 case MVT::v2i32:
[all...] |
| AArch64ISelLowering.cpp | 106 addDRTypeForNEON(MVT::v2i32);
307 // load, floating-point truncating stores, or v2i32->v2i16 truncating store.
430 setOperationAction(ISD::SINT_TO_FP, MVT::v2i32, Custom);
431 setOperationAction(ISD::UINT_TO_FP, MVT::v2i32, Custom);
438 setTruncStoreAction(MVT::v2i32, MVT::v2i16, Expand);
484 AddPromotedToType(ISD::LOAD, VT.getSimpleVT(), MVT::v2i32);
487 AddPromotedToType(ISD::STORE, VT.getSimpleVT(), MVT::v2i32);
551 addTypeForNEON(VT, MVT::v2i32);
[all...] |
| /external/clang/test/CodeGen/ |
| x86_64-arguments.c | 264 typedef unsigned v2i32 __attribute((__vector_size__(8))); typedef
265 v2i32 f36(v2i32 arg) { return arg; }
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 64 (int)MVT::v2i32,
92 (int)MVT::v2i32,
501 INTTY = MVT::v2i32;
649 INTTY = MVT::v2i32;
667 INTTY = MVT::v2i32;
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 64 (int)MVT::v2i32,
92 (int)MVT::v2i32,
501 INTTY = MVT::v2i32;
649 INTTY = MVT::v2i32;
667 INTTY = MVT::v2i32;
|
| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 151 case MVT::v2i32: return "v2i32";
219 case MVT::v2i32: return VectorType::get(Type::getInt32Ty(Context), 2);
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | 140 AddPromotedToType(ISD::STORE, MVT::v2f32, MVT::v2i32);
143 AddPromotedToType(ISD::STORE, MVT::i64, MVT::v2i32);
163 // XXX: Native v2i32 local address space stores are possible, but not
165 setOperationAction(ISD::STORE, MVT::v2i32, Custom);
167 setTruncStoreAction(MVT::v2i32, MVT::v2i16, Custom);
168 setTruncStoreAction(MVT::v2i32, MVT::v2i8, Custom);
186 AddPromotedToType(ISD::LOAD, MVT::v2f32, MVT::v2i32);
189 AddPromotedToType(ISD::LOAD, MVT::i64, MVT::v2i32);
211 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v2i32, Custom);
284 MVT::v2i32, MVT::v4i3
[all...] |
| SIISelLowering.cpp | 43 addRegisterClass(MVT::v2i32, &AMDGPU::SReg_64RegClass);
84 setOperationAction(ISD::LOAD, MVT::v2i32, Custom);
94 setOperationAction(ISD::LOAD, MVT::v2i32, Custom);
100 setOperationAction(ISD::STORE, MVT::v2i32, Custom);
[all...] |
| R600ISelLowering.cpp | 40 addRegisterClass(MVT::v2i32, &AMDGPU::R600_Reg64RegClass);
67 setOperationAction(ISD::SETCC, MVT::v2i32, Expand);
88 setOperationAction(ISD::SELECT, MVT::v2i32, Expand);
109 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i32, Expand);
117 setOperationAction(ISD::LOAD, MVT::v2i32, Custom);
131 setOperationAction(ISD::STORE, MVT::v2i32, Custom);
140 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2i32, Custom);
145 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2i32, Custom);
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 92 case MVT::v2i32: return "MVT::v2i32";
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 61 case MVT::v2i32:
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 607 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i32, Legal);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.cpp | [all...] |
