/hardware/intel/img/libdrm/libdrm/radeon/ |
radeon_cs_space.c | 41 uint32_t read_domains, write_domain; local 47 write_domain = sc->write_domain; 51 bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain; 56 if (write_domain && (write_domain == bo->space_accounted)) { 66 if (write_domain == RADEON_GEM_DOMAIN_VRAM) 68 else if (write_domain == RADEON_GEM_DOMAIN_GTT) 72 sc->new_accounted = (read_domains << 16) | write_domain; 79 if (write_domain && (old_read & write_domain)) [all...] |
radeon_bo_gem.h | 41 int radeon_gem_set_domain(struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain);
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radeon_cs.h | 44 uint32_t write_domain; member in struct:radeon_cs_reloc 56 uint32_t write_domain; member in struct:radeon_cs_space_check 91 uint32_t write_domain, 126 uint32_t write_domain, 132 write_domain, 230 uint32_t write_domain); 244 uint32_t write_domain);
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radeon_cs_gem.c | 48 uint32_t write_domain; member in struct:cs_reloc_gem 113 uint32_t write_domain, 124 if ((read_domain && write_domain) || (!read_domain && !write_domain)) { 133 if (write_domain == RADEON_GEM_DOMAIN_CPU) { 148 if (write_domain && (reloc->read_domain & write_domain)) { 150 reloc->write_domain = write_domain; 151 } else if (read_domain & reloc->write_domain) { [all...] |
radeon_bo_gem.c | 321 int radeon_gem_set_domain(struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain) 328 args.write_domain = write_domain;
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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/intel/ |
intel_batchbuffer.h | 52 uint32_t write_domain, 57 uint32_t write_domain, 159 #define OUT_RELOC(buf, read_domains, write_domain, delta) do { \ 161 read_domains, write_domain, delta); \ 163 #define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \ 165 read_domains, write_domain, delta); \
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intel_batchbuffer.c | 268 uint32_t read_domains, uint32_t write_domain, 275 read_domains, write_domain); 293 uint32_t write_domain, 300 read_domains, write_domain);
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/external/mesa3d/src/mesa/drivers/dri/intel/ |
intel_batchbuffer.h | 52 uint32_t write_domain, 57 uint32_t write_domain, 159 #define OUT_RELOC(buf, read_domains, write_domain, delta) do { \ 161 read_domains, write_domain, delta); \ 163 #define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \ 165 read_domains, write_domain, delta); \
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intel_batchbuffer.c | 268 uint32_t read_domains, uint32_t write_domain, 275 read_domains, write_domain); 293 uint32_t write_domain, 300 read_domains, write_domain);
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/external/chromium_org/third_party/mesa/src/src/gallium/winsys/i915/drm/ |
i915_drm_batchbuffer.c | 101 unsigned write_domain = 0; local 108 write_domain = 0; 112 write_domain = I915_GEM_DOMAIN_RENDER; 116 write_domain = I915_GEM_DOMAIN_RENDER; 120 write_domain = 0; 124 write_domain = 0; 138 write_domain); 143 write_domain);
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/external/mesa3d/src/gallium/winsys/i915/drm/ |
i915_drm_batchbuffer.c | 101 unsigned write_domain = 0; local 108 write_domain = 0; 112 write_domain = I915_GEM_DOMAIN_RENDER; 116 write_domain = I915_GEM_DOMAIN_RENDER; 120 write_domain = 0; 124 write_domain = 0; 138 write_domain); 143 write_domain);
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/external/chromium_org/third_party/mesa/src/src/gallium/winsys/radeon/drm/ |
radeon_drm_cs.h | 112 return cs->csc->relocs[index].write_domain != 0;
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radeon_drm_cs.c | 46 cs_add_reloc(cs, buf, read_domain, write_domain) adds a new relocation and 61 cs_add_reloc. The read_domain and write_domain parameters have been removed, 204 *added_domains = (rd | wd) & ~(reloc->read_domains | reloc->write_domain); 207 reloc->write_domain |= wd; 302 reloc->write_domain = wd; 548 if ((usage & RADEON_USAGE_WRITE) && cs->csc->relocs[index].write_domain)
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/external/mesa3d/src/gallium/winsys/radeon/drm/ |
radeon_drm_cs.h | 112 return cs->csc->relocs[index].write_domain != 0;
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radeon_drm_cs.c | 46 cs_add_reloc(cs, buf, read_domain, write_domain) adds a new relocation and 61 cs_add_reloc. The read_domain and write_domain parameters have been removed, 204 *added_domains = (rd | wd) & ~(reloc->read_domains | reloc->write_domain); 207 reloc->write_domain |= wd; 302 reloc->write_domain = wd; 548 if ((usage & RADEON_USAGE_WRITE) && cs->csc->relocs[index].write_domain)
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/hardware/intel/img/libdrm/libdrm/intel/ |
intel_bufmgr_priv.h | 135 uint32_t read_domains, uint32_t write_domain);
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intel_bufmgr.c | 170 uint32_t read_domains, uint32_t write_domain) 174 read_domains, write_domain);
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intel_bufmgr_fake.c | 88 uint32_t write_domain; member in struct:fake_buffer_reloc 199 uint32_t write_domain; member in struct:_drm_intel_bo_fake [all...] |
intel_bufmgr_gem.c | 651 set_domain.write_domain = I915_GEM_DOMAIN_CPU; 653 set_domain.write_domain = 0; 724 set_domain.write_domain = I915_GEM_DOMAIN_GTT; 887 set_domain.write_domain = write_enable ? I915_GEM_DOMAIN_GTT : 0; 894 bo_gem->gem_handle, set_domain.read_domains, set_domain.write_domain, 938 uint32_t read_domains, uint32_t write_domain) 955 assert ((write_domain & (write_domain-1)) == 0); 972 bo_gem->relocs[bo_gem->reloc_count].write_domain = write_domain; [all...] |
intel_bufmgr.h | 102 uint32_t read_domains, uint32_t write_domain);
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/hardware/intel/img/libdrm/shared-core/ |
i915_drm.h | 499 uint32_t write_domain; member in struct:drm_i915_gem_set_domain 549 uint32_t write_domain; member in struct:drm_i915_gem_relocation_entry
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.6/sysroot/usr/include/drm/ |
i915_drm.h | 447 __u32 write_domain; member in struct:drm_i915_gem_set_domain 497 __u32 write_domain; member in struct:drm_i915_gem_relocation_entry
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/drm/ |
i915_drm.h | 447 __u32 write_domain; member in struct:drm_i915_gem_set_domain 497 __u32 write_domain; member in struct:drm_i915_gem_relocation_entry
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/bionic/libc/kernel/uapi/drm/ |
i915_drm.h | 424 __u32 write_domain; member in struct:drm_i915_gem_set_domain 437 __u32 write_domain; member in struct:drm_i915_gem_relocation_entry
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radeon_drm.h | 802 uint32_t write_domain; member in struct:drm_radeon_gem_set_domain 877 uint32_t write_domain; member in struct:drm_radeon_cs_reloc [all...] |