| /external/llvm/test/CodeGen/X86/ |
| fma-do-not-commute.ll | 24 %fma = fadd float %sum0, %fmul
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| fp-une-cmp.ll | 36 %4 = fadd double %2, -1.000000e+00
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| pr17631.ll | 27 %ret = fadd <8 x float> %y, %y
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| soft-fp.ll | 25 %0 = fadd float %a, %b ; <float> [#uses=1]
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| vec_insert.ll | 8 %tmp18 = fadd <4 x float> %tmp1, %tmp1 ; <<4 x float>> [#uses=1]
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| vec_zero.ll | 7 %S = fadd <4 x float> zeroinitializer, %T ; <<4 x float>> [#uses=1]
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| brcond.ll | 102 %4 = fadd double %2, -1.000000e+00 ; <double> [#uses=1]
126 %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
150 %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
174 %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
198 %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
222 %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
246 %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
|
| haddsub-2.ll | 11 %add = fadd float %vecext, %vecext1
15 %add4 = fadd float %vecext2, %vecext3
19 %add8 = fadd float %vecext6, %vecext7
23 %add12 = fadd float %vecext10, %vecext11
35 %add = fadd float %vecext, %vecext1
39 %add4 = fadd float %vecext2, %vecext3
43 %add8 = fadd float %vecext6, %vecext7
47 %add12 = fadd float %vecext10, %vecext11
215 %add = fadd double %vecext, %vecext1
219 %add2 = fadd double %vecext2, %vecext
[all...] |
| multiple-loop-post-inc.ll | 44 %13 = fadd float %x.0, %0 ; <float> [#uses=1]
69 %22 = fadd float %21, %x.0 ; <float> [#uses=1]
70 %23 = fadd float %x.0, %0 ; <float> [#uses=1]
72 %25 = fadd float %24, %x.0 ; <float> [#uses=1]
74 %27 = fadd float %26, %x.0 ; <float> [#uses=1]
80 %32 = fadd <4 x float> %31, %asmtmp.i ; <<4 x float>> [#uses=3]
81 %33 = fadd <4 x float> %32, %asmtmp.i ; <<4 x float>> [#uses=3]
82 %34 = fadd <4 x float> %33, %asmtmp.i ; <<4 x float>> [#uses=2]
135 %41 = fadd <4 x float> %vX0.039, %asmtmp.i18 ; <<4 x float>> [#uses=2]
143 %45 = fadd <4 x float> %vX3.041, %asmtmp.i18 ; <<4 x float>> [#uses=1
[all...] |
| /external/llvm/test/MC/Disassembler/X86/ |
| fp-stack.txt | 4 # CHECK: fadd %st(0)
7 # CHECK: fadd %st(1)
10 # CHECK: fadd %st(2)
13 # CHECK: fadd %st(3)
16 # CHECK: fadd %st(4)
19 # CHECK: fadd %st(5)
22 # CHECK: fadd %st(6)
25 # CHECK: fadd %st(7)
577 # CHECK: fadd %st(0), %st(0)
580 # CHECK: fadd %st(0), %st(1
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| bitcast-bigendian.ll | 18 %add = fadd float %tmp24, %tmp4
25 ; CHECK-NEXT: %add = fadd float %tmp24, %tmp4
40 %add = fadd float %tmp24, %tmp4
47 ; CHECK-NEXT: %add = fadd float %tmp24, %tmp4
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| dce-iterate.ll | 21 %f = fadd double %b, %e
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| sincospi.ll | 24 %res = fadd float %sin, %cos
43 %res = fadd float %sin, %cos
61 %res = fadd double %sin, %cos
80 %res = fadd double %sin, %cos
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| /external/llvm/test/Transforms/LoopVectorize/ |
| flags.ll | 58 ; CHECK: fadd fast <4 x float>
60 ; CHECK: fadd fast <4 x float>
61 ; CHECK: fadd fast <4 x float>
71 %add = fadd fast float %q.04, %0
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| /external/llvm/test/Transforms/SLPVectorizer/X86/ |
| insert-element-build-vector.ll | 202 ; CHECK: %1 = fadd <4 x float> %a, %b
205 %c0 = fadd float %a0, %b0
209 %c1 = fadd float %a1, %b1
213 %c2 = fadd float %a2, %b2
217 %c3 = fadd float %a3, %b3
226 ; ZEROTHRESH: %1 = fadd <4 x float> %a, %b
229 %c0 = fadd float %a0, %b0
232 %c1 = fadd float %a1, %b1
235 %c2 = fadd float %a2, %b2
238 %c3 = fadd float %a3, %b
[all...] |
| addsub.ll | 103 ; CHECK: %2 = fadd <4 x float> %0, %1
111 %add = fadd float %0, %1
119 %add1 = fadd float %4, %5
130 ; CHECK: %3 = fadd <4 x float> %0, %1
141 %add = fadd float %2, %3
149 %add2 = fadd float %6, %7
155 ; CHECK-NOT: fadd <4 x float>
163 %add = fadd float %0, %1
167 %add1 = fadd float %2, %3
171 %add2 = fadd float %4, %
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| fp-dp3.ll | 91 %sum = fadd float %a, %prod
95 ; CHECK-NOFAST: fadd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
130 %sum = fadd float %nega, %prod
143 %sum = fadd float %a, %prod
144 %res = fadd float %sum, %prod
147 ; CHECK: fadd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
148 ; CHECK: fadd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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| arm64-neon-add-sub.ll | 46 ;CHECK: fadd {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
47 %tmp3 = fadd <2 x float> %A, %B;
52 ;CHECK: fadd {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
53 %tmp3 = fadd <4 x float> %A, %B;
58 %tmp3 = fadd <2 x double> %A, %B;
123 ; CHECK: fadd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
124 %1 = fadd <1 x double> %a, %b
145 ; CHECK: fadd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
147 %2 = fadd <1 x double> %1, %a
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| /external/llvm/test/ExecutionEngine/ |
| test-interp-vec-select.ll | 30 %a2_float = fadd <2 x float> zeroinitializer, <float 0.0, float 1.0>
31 %a3_float = fadd <3 x float> zeroinitializer, <float 0.0, float 1.0, float 2.0>
32 %a4_float = fadd <4 x float> zeroinitializer, <float 0.0, float 1.0, float 2.0, float 3.0>
33 %a8_float = fadd <8 x float> zeroinitializer, <float 0.0, float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0>
34 %a16_float = fadd <16 x float> zeroinitializer, <float 0.0, float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, float 11.0, float 12.0, float 13.0, float 14.0, float 15.0>
36 %a2_double = fadd <2 x double> zeroinitializer, <double 0.0, double 1.0>
37 %a3_double = fadd <3 x double> zeroinitializer, <double 0.0, double 1.0, double 2.0>
38 %a4_double = fadd <4 x double> zeroinitializer, <double 0.0, double 1.0, double 2.0, double 3.0>
39 %a8_double = fadd <8 x double> zeroinitializer, <double 0.0, double 1.0, double 2.0, double 3.0, double 4.0, double 5.0, double 6.0, double 7.0>
40 %a16_double = fadd <16 x double> zeroinitializer, <double 0.0, double 1.0, double 2.0, double 3.0, double 4.0, double (…)
[all...] |
| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/arm64/ |
| ComplexToRealFixup.S | 134 fadd dY0r,dX0r,dX0i // F(0) = ((Z0.r+Z0.i) , 0)
185 fadd dT0,dX0r,dX1r // a+c
187 fadd dT3,dX0i,dX1i // b+d
215 fadd dY1i,dT1,dX1r
226 fadd dY0i,dT1,dX0r
|
| /external/clang/test/CodeGen/ |
| ext-vector.c | 15 // CHECK: fadd <4 x float>
80 // CHECK: fadd <4 x float>
89 // CHECK: fadd <4 x float>
98 // CHECK: fadd <4 x float>
107 // CHECK: fadd <4 x float>
|
| /external/llvm/test/Transforms/InstSimplify/ |
| call.ll | 96 %r0 = fadd float %a1, %b1
97 %r1 = fadd float %r0, %c1
98 %r2 = fadd float %r1, %d1
99 %r3 = fadd float %r2, %e1
100 %r4 = fadd float %r3, %f1
|
| /external/llvm/test/CodeGen/ARM/ |
| big-endian-vector-caller.ll | 11 %2 = fadd double %1, %1
43 %2 = fadd <2 x float> %1, %1
108 %4 = fadd double %3, %3
125 %4 = fadd double %3, %3
140 %2 = fadd <2 x float> %1, %1
142 %4 = fadd double %3, %3
159 %4 = fadd double %3, %3
176 %4 = fadd double %3, %3
193 %4 = fadd double %3, %3
224 %2 = fadd double %1, %
[all...] |
| coalesce-subregs.ll | 98 %add = fadd float %1, %2
135 %add = fadd float %1, %2
162 %add = fadd float %vecext3, 1.000000e+00
169 %add4 = fadd float %vecext, %1
171 %add6 = fadd float %vecext1, %2
174 %add8 = fadd float %vecext2, %3
210 %add = fadd double 1.0, %2
340 %add42 = fadd <2 x double> undef, %mul41
343 %add46 = fadd <2 x double> undef, %mul45
350 %add58 = fadd <2 x double> undef, %
[all...] |
| /external/llvm/test/MC/AArch64/ |
| neon-add-sub-instructions.s | 47 fadd v0.2s, v1.2s, v2.2s
48 fadd v0.4s, v1.4s, v2.4s
49 fadd v0.2d, v1.2d, v2.2d
51 // CHECK: fadd v0.2s, v1.2s, v2.2s // encoding: [0x20,0xd4,0x22,0x0e]
52 // CHECK: fadd v0.4s, v1.4s, v2.4s // encoding: [0x20,0xd4,0x22,0x4e]
53 // CHECK: fadd v0.2d, v1.2d, v2.2d // encoding: [0x20,0xd4,0x62,0x4e]
|
