| /external/llvm/test/MC/AArch64/ |
| arm64-fp-encoding.s | 14 fadd s1, s2, s3
15 fadd d1, d2, d3
17 ; CHECK: fadd s1, s2, s3 ; encoding: [0x41,0x28,0x23,0x1e]
18 ; CHECK: fadd d1, d2, d3 ; encoding: [0x41,0x28,0x63,0x1e]
|
| /external/llvm/test/Transforms/JumpThreading/ |
| select.ll | 168 %add = fadd double %x, %y
|
| /external/llvm/utils/emacs/ |
| llvm-mode.el | 38 `(,(regexp-opt '("fadd" "fsub" "fmul" "fdiv" "frem") 'words) . font-lock-keyword-face)
|
| /external/llvm/utils/kate/ |
| llvm.xml | 120 <item> fadd </item>
|
| /external/mockito/cglib-and-asm/src/org/mockito/asm/tree/analysis/ |
| BasicInterpreter.java | 247 case FADD:
|
| Interpreter.java | 116 * LADD, FADD, DADD, ISUB, LSUB, FSUB, DSUB, IMUL, LMUL, FMUL, DMUL, IDIV,
|
| /external/mockito/cglib-and-asm/src/org/mockito/asm/util/ |
| AbstractVisitor.java | 65 + "FADD,DADD,ISUB,LSUB,FSUB,DSUB,IMUL,LMUL,FMUL,DMUL,IDIV,LDIV,"
|
| /prebuilts/ndk/9/platforms/android-21/arch-arm/usr/include/linux/ |
| rds.h | 184 } fadd; member in union:rds_atomic_args::__anon76425
|
| /prebuilts/ndk/9/platforms/android-21/arch-arm64/usr/include/linux/ |
| rds.h | 184 } fadd; member in union:rds_atomic_args::__anon77192
|
| /prebuilts/ndk/9/platforms/android-21/arch-mips/usr/include/linux/ |
| rds.h | 184 } fadd; member in union:rds_atomic_args::__anon77971
|
| /prebuilts/ndk/9/platforms/android-21/arch-mips64/usr/include/linux/ |
| rds.h | 184 } fadd; member in union:rds_atomic_args::__anon78749
|
| /prebuilts/ndk/9/platforms/android-21/arch-x86/usr/include/linux/ |
| rds.h | 184 } fadd; member in union:rds_atomic_args::__anon79525
|
| /prebuilts/ndk/9/platforms/android-21/arch-x86_64/usr/include/linux/ |
| rds.h | 184 } fadd; member in union:rds_atomic_args::__anon80302
|
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 480 /// than a pair of fmul and fadd instructions. fmuladd intrinsics will be
482 /// expanded to fmul + fadd.
485 /// lower a pair of fmul and fadd to the latter so it's not clear that there
|
| /external/llvm/test/CodeGen/ARM/ |
| reg_sequence.ll | 287 %8 = fadd <4 x float> %7, undef ; <<4 x float>> [#uses=1]
288 %9 = fadd <4 x float> %8, undef ; <<4 x float>> [#uses=1]
294 %15 = fadd <4 x float> undef, %14 ; <<4 x float>> [#uses=1]
|
| /frameworks/rs/driver/runtime/arch/ |
| asimd.ll | [all...] |
| neon.ll | [all...] |
| /prebuilts/misc/common/swig/include/2.0.11/tcl/ |
| typemaps.i | 44 double fadd(double *a, double *b) {
51 double fadd(double *INPUT, double *INPUT);
57 double fadd(double *a, double *b);
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXVector.td | 509 [(set regclass:$dst, (fadd
524 defm VAddf : FloatBinVOp<"add.", fadd, FADDf64rr, FADDf32rr, FADDf32rr_ftz>;
528 defm F32MAD_ftz : VMAD<"mad.ftz.f32", V4F32Regs, V2F32Regs, fadd, fmul,
530 defm F32FMA_ftz : VMAD<"fma.rn.ftz.f32", V4F32Regs, V2F32Regs, fadd, fmul,
532 defm F32MAD : VMAD<"mad.f32", V4F32Regs, V2F32Regs, fadd, fmul, FMAD32rrr,
534 defm F32FMA : VMAD<"fma.rn.f32", V4F32Regs, V2F32Regs, fadd, fmul, FMA32rrr,
[all...] |
| /external/chromium_org/v8/src/arm64/ |
| constants-arm64.h | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 153 /// F8RC = FADDRTZ F8RC, F8RC - This is an FADD done with rounding
498 /// than a pair of fmul and fadd instructions. fmuladd intrinsics will be
500 /// expanded to fmul + fadd.
|
| /external/vixl/src/a64/ |
| constants-a64.h | [all...] |
| /dalvik/dx/tests/024-code-bytecode/ |
| expected.txt | 152 0081: fadd
|
| small-class.txt | 156 62 # 0081: fadd
|
| /external/llvm/lib/ExecutionEngine/ |
| ExecutionEngine.cpp | 760 case Instruction::FAdd:
795 case Instruction::FAdd:
810 case Instruction::FAdd:
829 case Instruction::FAdd:
[all...] |
