| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /art/compiler/dex/quick/arm64/ |
| assemble_arm64.cc | 238 "fadd", "!0f, !1f, !2f", kFixupNone),
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| SIInstructions.td | [all...] |
| /external/chromium_org/v8/src/arm64/ |
| lithium-codegen-arm64.cc | [all...] |
| assembler-arm64.cc | 1809 void Assembler::fadd(const FPRegister& fd, function in class:v8::internal::Assembler
[all...] |
| /external/chromium_org/v8/src/ia32/ |
| assembler-ia32.h | 880 void fadd(int i);
[all...] |
| /external/chromium_org/v8/src/x87/ |
| assembler-x87.cc | 1671 void Assembler::fadd(int i) { function in class:v8::internal::Assembler
[all...] |
| assembler-x87.h | 864 void fadd(int i);
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 227 FADD, FSUB, FMUL, FMA, FDIV, FREM,
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrAltivec.td | 375 [(set v4f32:$vD, (fadd v4f32:$vA, v4f32:$vB))]>;
[all...] |
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86BaseInfo.h | 427 // argument. For example: fadd, fsub, fmul, etc...
|
| /external/llvm/test/CodeGen/X86/ |
| avx-intrinsics-x86.ll | 686 ; fadd operation forces the execution domain.
687 %a2 = fadd <2 x double> %a1, <double 0x0, double 0x4200000000000000>
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| SIInstructions.td | [all...] |
| /external/qemu/disas/ |
| i386.c | [all...] |
| /external/valgrind/main/none/tests/ppc32/ |
| jm-insns.c | [all...] |
| /external/clang/test/CodeGen/ |
| builtins-mips-msa.c | 326 v4f32_r = __builtin_msa_fadd_w(v4f32_a, v4f32_b); // CHECK: call <4 x float> @llvm.mips.fadd.w(
327 v2f64_r = __builtin_msa_fadd_d(v2f64_a, v2f64_b); // CHECK: call <2 x double> @llvm.mips.fadd.d(
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.td | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMInstrVFP.td | 293 [(set DPR:$Dd, (fadd DPR:$Dn, (f64 DPR:$Dm)))]>;
299 [(set SPR:$Sd, (fadd SPR:$Sn, SPR:$Sm))]> {
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600ISelLowering.cpp | [all...] |
| R600Instructions.td | 673 def ADD : R600_2OP_Helper <0x0, "ADD", fadd>;
915 [(set f32:$dst, (fadd (fmul f32:$src0, f32:$src1), f32:$src2))]
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FloatingPoint.cpp | [all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| Reassociate.cpp | [all...] |
| /external/pcre/dist/sljit/ |
| sljitNativePPC_common.c | 161 #define FADD (HI(63) | LO(21))
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/lib/gcc/x86_64-w64-mingw32/4.8.3/plugin/include/config/i386/ |
| i386.h | 165 const int fadd; /* cost of FADD and FSUB instructions. */ member in struct:processor_costs
[all...] |
