| /external/clang/test/Preprocessor/ |
| aarch64-target-features.c | 28 // RUN: %clang -target aarch64-none-linux-gnu -mfpu=crypto-neon-fp-armv8 -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-CRYPTO %s
29 // RUN: %clang -target arm64-none-linux-gnu -mfpu=crypto-neon-fp-armv8 -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-CRYPTO %s
48 // RUN: %clang -target aarch64-none-linux-gnu -mfpu=neon -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NEON %s
49 // RUN: %clang -target arm64-none-linux-gnu -mfpu=neon -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NEON %s
50 // CHECK-NEON: __ARM_NEON 1
51 // CHECK-NEON: __ARM_NEON_FP 0xe
|
| /external/libvpx/libvpx/vpx_scale/ |
| vpx_scale_rtcd.pl | 20 specialize qw/vp8_yv12_extend_frame_borders neon/;
23 specialize qw/vp8_yv12_copy_frame neon/;
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-2013-01-13-ffast-fcmp.ll | 1 ; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s
2 ; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple -fp-contract=fast | FileCheck %s --check-prefix=FAST
|
| arm64-complex-copy-noneon.ll | 1 ; RUN: llc -mtriple=arm64-none-linux-gnu -mattr=-neon < %s
4 ; previously. This probably shouldn't happen without NEON, but the most
|
| complex-copy-noneon.ll | 1 ; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=-neon < %s
4 ; previously. This probably shouldn't happen without NEON, but the most
|
| arm64-vecFold.ll | 1 ; RUN: llc -march=arm64 -aarch64-neon-syntax=apple -o - %s| FileCheck %s
53 %vaddhn2.i = tail call <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32> %a0, <4 x i32> %a1) nounwind
54 %vaddhn2.i10 = tail call <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32> %b0, <4 x i32> %b1) nounwind
67 %vaddhn2.i = tail call <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32> %a0, <4 x i32> %a1) nounwind
86 %vraddhn2.i = tail call <4 x i16> @llvm.aarch64.neon.raddhn.v4i16(<4 x i32> %a0, <4 x i32> %a1) nounwind
87 %vraddhn2.i10 = tail call <4 x i16> @llvm.aarch64.neon.raddhn.v4i16(<4 x i32> %b0, <4 x i32> %b1) nounwind
100 %vrshrn_n1 = tail call <8 x i8> @llvm.aarch64.neon.rshrn.v8i8(<8 x i16> %a0, i32 5)
101 %vrshrn_n4 = tail call <8 x i8> @llvm.aarch64.neon.rshrn.v8i8(<8 x i16> %b0, i32 6)
114 %vrsubhn2.i = tail call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> %a0, <8 x i16> %a1) nounwind
115 %vrsubhn2.i10 = tail call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> %b0, <8 x i16> %b1) nounwin
[all...] |
| arm64-vadd.ll | 1 ; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple -asm-verbose=false | FileCheck %s
8 %tmp3 = call <8 x i8> @llvm.aarch64.neon.addhn.v8i8(<8 x i16> %tmp1, <8 x i16> %tmp2)
17 %tmp3 = call <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32> %tmp1, <4 x i32> %tmp2)
26 %tmp3 = call <2 x i32> @llvm.aarch64.neon.addhn.v2i32(<2 x i64> %tmp1, <2 x i64> %tmp2)
34 %vaddhn2.i = tail call <8 x i8> @llvm.aarch64.neon.addhn.v8i8(<8 x i16> %a, <8 x i16> %b) nounwind
35 %vaddhn_high2.i = tail call <8 x i8> @llvm.aarch64.neon.addhn.v8i8(<8 x i16> %a, <8 x i16> %b) nounwind
44 %vaddhn2.i = tail call <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32> %a, <4 x i32> %b) nounwind
45 %vaddhn_high3.i = tail call <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32> %a, <4 x i32> %b) nounwind
54 %vaddhn2.i = tail call <2 x i32> @llvm.aarch64.neon.addhn.v2i32(<2 x i64> %a, <2 x i64> %b) nounwind
55 %vaddhn_high3.i = tail call <2 x i32> @llvm.aarch64.neon.addhn.v2i32(<2 x i64> %a, <2 x i64> %b) nounwin
[all...] |
| arm64-neon-vector-list-spill.ll | 1 ; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-none-linux-gnu -mattr=+neon -fp-contract=fast | FileCheck %s
13 %vld = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0i32(i32* %arg1)
33 %vld = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0i16(i16* %arg1)
53 %vld = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0i16(i16* %arg1)
73 %vld = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i32(i32* %arg1)
93 %vld3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3.v4f32.p0f32(float* %arg1)
113 %vld = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0i8(i8* %arg1)
127 declare { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0i32(i32*)
128 declare { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0i16(i16*)
129 declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0i16(i16*
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| fmacs.ll | 2 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s -check-prefix=NEON
12 ; NEON-LABEL: t1:
13 ; NEON: vmla.f32
28 ; NEON-LABEL: t2:
29 ; NEON: vmla.f64
44 ; NEON-LABEL: t3:
45 ; NEON: vmla.f32
|
| 2014-01-09-pseudo_expand_implicit_reg.ll | 1 ; RUN: llc -mtriple=arm-eabi -mattr=+neon -print-before=post-RA-sched %s -o - 2>&1 \
30 call void @llvm.arm.neon.vst4.v1i64(i8* %m, <1 x i64> %s0, <1 x i64> %s1, <1 x i64> %s2, <1 x i64> %s3, i32 8)
48 %tmp8 = call <8 x i8> @llvm.arm.neon.vtbx4(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5, <8 x i8> %tmp6, <8 x i8> %tmp7)
53 declare void @llvm.arm.neon.vst4.v1i64(i8*, <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64>, i32)
54 declare <8 x i8> @llvm.arm.neon.vtbx4(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
|
| select.ll | 6 ; RUN: llc -mtriple=thumbv7-apple-darwin -mattr=+neon,+thumb2 %s -o - \
7 ; RUN: | FileCheck %s --check-prefix=CHECK-NEON
82 ; CHECK-NEON-LABEL: f8:
83 ; CHECK-NEON: movw [[R3:r[0-9]+]], #1123
84 ; CHECK-NEON: adr [[R2:r[0-9]+]], LCPI7_0
85 ; CHECK-NEON-NEXT: cmp r0, [[R3]]
86 ; CHECK-NEON-NEXT: it eq
87 ; CHECK-NEON-NEXT: addeq{{.*}} [[R2]], #4
88 ; CHECK-NEON-NEXT: ldr
89 ; CHECK-NEON: b
[all...] |
| vshrn.ll | 1 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
64 %tmp2 = call <8 x i8> @llvm.arm.neon.vrshiftn.v8i8(<8 x i16> %tmp1, <8 x i16> < i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8 >)
72 %tmp2 = call <4 x i16> @llvm.arm.neon.vrshiftn.v4i16(<4 x i32> %tmp1, <4 x i32> < i32 -16, i32 -16, i32 -16, i32 -16 >)
80 %tmp2 = call <2 x i32> @llvm.arm.neon.vrshiftn.v2i32(<2 x i64> %tmp1, <2 x i64> < i64 -32, i64 -32 >)
84 declare <8 x i8> @llvm.arm.neon.vrshiftn.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
85 declare <4 x i16> @llvm.arm.neon.vrshiftn.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
86 declare <2 x i32> @llvm.arm.neon.vrshiftn.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
|
| /external/oprofile/events/arm/armv7/ |
| events | 17 event:0x4C counters:1,2,3,4 um:zero minimum:500 name:L1_NEON_DATA : NEON data access that hits L1 cache
18 event:0x4D counters:1,2,3,4 um:zero minimum:500 name:L1_NEON_CACH_DATA : NEON cacheable data access that hits L1 cache
19 event:0x4E counters:1,2,3,4 um:zero minimum:500 name:L2_NEON : L2 access as a result of NEON memory access
20 event:0x4F counters:1,2,3,4 um:zero minimum:500 name:L2_NEON_HIT : Any NEON hit in L2 cache
29 event:0x58 counters:1,2,3,4 um:zero minimum:500 name:CYCLES_NEON_DATA_STALL : Number of cycles the processor waits on MRC data from NEON
30 event:0x59 counters:1,2,3,4 um:zero minimum:500 name:CYCLES_NEON_INST_STALL : Number of cycles the processor waits on NEON instruction queue or NEON load queue
31 event:0x5A counters:1,2,3,4 um:zero minimum:500 name:NEON_CYCLES : Number of cycles NEON and integer processors are not idle
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vpx_scale/ |
| vpx_scale_rtcd.pl | 20 specialize qw/vp8_yv12_extend_frame_borders neon/;
23 specialize qw/vp8_yv12_copy_frame neon/;
|
| /ndk/tests/build/build-mode/jni/ |
| main.c | 42 # error "This source file should be compiled with NEON support!"
46 # error "This source file should be compiled without NEON support!"
|
| /build/target/board/generic/ |
| BoardConfig.mk | 11 # Note: we build the platform images for ARMv7-A _without_ NEON.
13 # Technically, the emulator supports ARMv7-A _and_ NEON instructions, but
14 # emulated NEON code paths typically ends up 2x slower than the normal C code
18 # What this means is that the platform image will not use NEON code paths
20 # application code generated with the NDK that uses NEON in the emulator.
|
| /external/clang/test/CodeGen/ |
| arm64-vrnd.c | 1 // RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -emit-llvm -o - %s | FileCheck %s
14 // CHECK: call <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float>
16 // CHECK: call <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float>
18 // CHECK: call <2 x double> @llvm.aarch64.neon.frintn.v2f64(<2 x double>
20 // CHECK: call <2 x double> @llvm.aarch64.neon.frintn.v2f64(<2 x double>
|
| /external/libpng/contrib/arm-neon/ |
| linux-auxv.c | 1 /* contrib/arm-neon/linux-auxv.c
11 * SEE contrib/arm-neon/README before reporting bugs
18 * read /proc/cpuinfo in contrib/arm-neon/linux, however it is yet another piece
23 * looking at each element for one that records NEON capabilities.
102 /* Failsafe: failure to open means no NEON */
|
| /external/libvpx/libvpx/build/make/ |
| Android.mk | 37 # By default libvpx will detect at runtime the existance of NEON extension.
40 # Configuring with --disable-runtime-cpu-detect will assume presence of NEON.
41 # Configuring with --disable-runtime-cpu-detect --disable-neon will remove any
42 # NEON dependency.
138 # The neon files with intrinsics need to have .neon appended so the proper
145 LOCAL_SRC_FILES += $(foreach file, $(LOCAL_NEON_SRCS_C), libvpx/$(file).neon)
147 # Pull out assembly files, splitting NEON from the rest. This is
148 # done to specify that the NEON assembly files use NEON assembler flags
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/build/make/ |
| Android.mk | 37 # By default libvpx will detect at runtime the existance of NEON extension.
40 # Configuring with --disable-runtime-cpu-detect will assume presence of NEON.
41 # Configuring with --disable-runtime-cpu-detect --disable-neon will remove any
42 # NEON dependency.
138 # The neon files with intrinsics need to have .neon appended so the proper
145 LOCAL_SRC_FILES += $(foreach file, $(LOCAL_NEON_SRCS_C), libvpx/$(file).neon)
147 # Pull out assembly files, splitting NEON from the rest. This is
148 # done to specify that the NEON assembly files use NEON assembler flags
[all...] |
| /external/chromium_org/third_party/libvpx/ |
| libvpx.target.darwin-arm64.mk | 31 third_party/libvpx/source/libvpx/vp8/common/arm/neon/bilinearpredict_neon.c \
32 third_party/libvpx/source/libvpx/vp8/common/arm/neon/copymem_neon.c \
33 third_party/libvpx/source/libvpx/vp8/common/arm/neon/dc_only_idct_add_neon.c \
34 third_party/libvpx/source/libvpx/vp8/common/arm/neon/dequant_idct_neon.c \
35 third_party/libvpx/source/libvpx/vp8/common/arm/neon/dequantizeb_neon.c \
36 third_party/libvpx/source/libvpx/vp8/common/arm/neon/idct_blk_neon.c \
37 third_party/libvpx/source/libvpx/vp8/common/arm/neon/idct_dequant_0_2x_neon.c \
38 third_party/libvpx/source/libvpx/vp8/common/arm/neon/idct_dequant_full_2x_neon.c \
39 third_party/libvpx/source/libvpx/vp8/common/arm/neon/iwalsh_neon.c \
40 third_party/libvpx/source/libvpx/vp8/common/arm/neon/loopfilter_neon.c
[all...] |
| libvpx.target.linux-arm64.mk | 31 third_party/libvpx/source/libvpx/vp8/common/arm/neon/bilinearpredict_neon.c \
32 third_party/libvpx/source/libvpx/vp8/common/arm/neon/copymem_neon.c \
33 third_party/libvpx/source/libvpx/vp8/common/arm/neon/dc_only_idct_add_neon.c \
34 third_party/libvpx/source/libvpx/vp8/common/arm/neon/dequant_idct_neon.c \
35 third_party/libvpx/source/libvpx/vp8/common/arm/neon/dequantizeb_neon.c \
36 third_party/libvpx/source/libvpx/vp8/common/arm/neon/idct_blk_neon.c \
37 third_party/libvpx/source/libvpx/vp8/common/arm/neon/idct_dequant_0_2x_neon.c \
38 third_party/libvpx/source/libvpx/vp8/common/arm/neon/idct_dequant_full_2x_neon.c \
39 third_party/libvpx/source/libvpx/vp8/common/arm/neon/iwalsh_neon.c \
40 third_party/libvpx/source/libvpx/vp8/common/arm/neon/loopfilter_neon.c
[all...] |
| /prebuilts/clang/linux-x86/host/3.4/bin/ |
| llvm-as | |
| llvm-dis | |
| llvm-link | |
