| /external/valgrind/main/none/tests/mips32/ |
| FPUarithmetic.c | 105 "addiu $t0, 1\n\t"
112 "addiu $t0, 2\n\t"
119 "addiu $t0, 3\n\t"
|
| MemCpyTest.c | 48 "addiu $v0, $v0, 4\n\t"
|
| /bionic/libc/private/ |
| bionic_atomic_mips.h | 67 " addiu %[status], %[prev], -1 \n"
|
| /external/chromium_org/v8/src/mips64/ |
| codegen-mips64.cc | 227 __ addiu(a0, a0, 16 * loadstore_chunk);
229 __ addiu(a1, a1, 16 * loadstore_chunk); // In delay slot.
248 __ addiu(a1, a1, 8 * loadstore_chunk);
257 __ addiu(a0, a0, 8 * loadstore_chunk);
272 __ addiu(a0, a0, loadstore_chunk);
273 __ addiu(a1, a1, loadstore_chunk);
283 __ addiu(a0, a0, 1);
284 __ addiu(a1, a1, 1);
410 __ addiu(a0, a0, 16 * loadstore_chunk);
412 __ addiu(a1, a1, 16 * loadstore_chunk); // In delay slot
[all...] |
| /external/llvm/test/CodeGen/Mips/cconv/ |
| return-hard-fp128.ll | 22 ; N32-DAG: addiu [[R3:\$[0-9]+]], [[R1]], %lo(fp128)
|
| callee-saved-fpxx.ll | 45 ; O32-FPXX: addiu $sp, $sp, -48
58 ; O32-FPXX: addiu $sp, $sp, 48
|
| /external/llvm/test/CodeGen/Mips/ |
| eh.ll | 9 ; CHECK-EL: addiu $sp, $sp
|
| inlineasmmemop.ll | 8 ; CHECK: addiu $[[T0:[0-9]+]], $sp
|
| largeimmprinting.ll | 14 ; 32: addiu $[[R0]], $[[R0]], -24
|
| llcarry.ll | 42 ; 16: addiu ${{[0-9]+}}, 15
|
| alloca.ll | 40 ; CHECK: addiu $4, $[[T0]], 40
50 ; CHECK: addiu $4, $[[T0]], 12
|
| atomic.ll | 105 ; ALL: addiu $[[R1:[0-9]+]], $zero, -4
144 ; ALL: addiu $[[R1:[0-9]+]], $zero, -4
183 ; ALL: addiu $[[R1:[0-9]+]], $zero, -4
223 ; ALL: addiu $[[R1:[0-9]+]], $zero, -4
262 ; ALL: addiu $[[R1:[0-9]+]], $zero, -4
308 ; ALL: addiu $[[R1:[0-9]+]], $zero, -4
384 ; ALL: addiu $[[PTR:[0-9]+]], $[[R0]], 1024
|
| /external/llvm/test/MC/Mips/ |
| elf-N64.s | 44 addiu $2, $zero, 0
|
| r-mips-got-disp.s | 38 addiu $2, $zero, 0
|
| micromips-alu-instructions.s | 12 # CHECK-EL: addiu $9, $6, -15001 # encoding: [0x26,0x31,0x67,0xc5]
14 # CHECK-EL: addiu $9, $6, -15001 # encoding: [0x26,0x31,0x67,0xc5]
46 # CHECK-EB: addiu $9, $6, -15001 # encoding: [0x31,0x26,0xc5,0x67]
48 # CHECK-EB: addiu $9, $6, -15001 # encoding: [0x31,0x26,0xc5,0x67]
79 addiu $9, $6,-15001
|
| /external/chromium_org/v8/test/cctest/ |
| test-disasm-mips64.cc | 317 COMPARE(addiu(a0, a1, 0x0),
318 "24a40000 addiu a0, a1, 0");
319 COMPARE(addiu(s0, s1, 32767),
320 "26307fff addiu s0, s1, 32767");
321 COMPARE(addiu(a6, a7, -32768),
322 "256a8000 addiu a6, a7, -32768");
323 COMPARE(addiu(v0, v1, -1),
324 "2462ffff addiu v0, v1, -1");
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| relocations.s | 33 # CHECK-FIXUP: addiu $2, $2, %pcrel_lo(bar) # encoding: [0x24,0x42,A,A]
68 addiu $2, $2, %pcrel_lo(bar)
|
| /external/chromium_org/third_party/libwebp/utils/ |
| rescaler.c | 210 "addiu %[temp6], $zero, -256 \n\t"
211 "addiu %[temp7], $zero, 255 \n\t"
218 "addiu %[frow_t], %[frow_t], 4 \n\t"
223 "addiu %[dst_t], %[dst_t], 1 \n\t"
224 "addiu %[irow_t], %[irow_t], 4 \n\t"
|
| /external/webp/src/utils/ |
| rescaler.c | 210 "addiu %[temp6], $zero, -256 \n\t"
211 "addiu %[temp7], $zero, 255 \n\t"
218 "addiu %[frow_t], %[frow_t], 4 \n\t"
223 "addiu %[dst_t], %[dst_t], 1 \n\t"
224 "addiu %[irow_t], %[irow_t], 4 \n\t"
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelDAGToDAG.cpp | 89 // Check if MI is "addiu $dst, $zero, 0" or "daddiu $dst, $zero, 0".
90 if ((MI.getOpcode() == Mips::ADDiu) &&
166 // addiu $globalbasereg, $v0, %lo(__gnu_local_gp)
169 BuildMI(MBB, I, DL, TII.get(Mips::ADDiu), GlobalBaseReg).addReg(V0)
180 // addiu $globalbasereg, $v1, %lo(%neg(%gp_rel(fname)))
185 BuildMI(MBB, I, DL, TII.get(Mips::ADDiu), GlobalBaseReg).addReg(V1)
196 // 1. addiu $2, $2, %lo(_gp_disp)
207 // the value instruction 1 (addiu) defines is valid when instruction 2 (addu)
318 // addiu $2, $2, %lo($CPI1_0)
702 // instructions (ADDiu, ORI and SLL) in that it does not have a registe
[all...] |
| MipsInstrInfo.td | 115 // target constant nodes that would otherwise remain unchanged with ADDiu
529 // e.g. addiu, sltiu
[all...] |
| /external/chromium_org/third_party/libwebp/dsp/ |
| enc_mips32.c | 65 "addiu %["#TEMP0"], %["#TEMP0"], 4 \n\t" \
103 "addiu %[temp20], $zero, 255 \n\t" \
175 "addiu %[temp5], $zero, 0 \n\t" \
176 "addiu %[level], $zero, 0 \n\t" \
437 "addiu %[temp16], %[temp16], 1812 \n\t" \
438 "addiu %[temp17], %[temp17], 937 \n\t" \
457 "addiu %[temp16], %[temp16], 7 \n\t" \
463 "addiu %["#TEMP8"], %["#TEMP8"], 30000 \n\t" \
464 "addiu %["#TEMP12"], %["#TEMP12"], 12000 \n\t" \
465 "addiu %["#TEMP8"], %["#TEMP8"], 21000 \n\t"
[all...] |
| /external/webp/src/dsp/ |
| enc_mips32.c | 65 "addiu %["#TEMP0"], %["#TEMP0"], 4 \n\t" \
103 "addiu %[temp20], $zero, 255 \n\t" \
175 "addiu %[temp5], $zero, 0 \n\t" \
176 "addiu %[level], $zero, 0 \n\t" \
437 "addiu %[temp16], %[temp16], 1812 \n\t" \
438 "addiu %[temp17], %[temp17], 937 \n\t" \
457 "addiu %[temp16], %[temp16], 7 \n\t" \
463 "addiu %["#TEMP8"], %["#TEMP8"], 30000 \n\t" \
464 "addiu %["#TEMP12"], %["#TEMP12"], 12000 \n\t" \
465 "addiu %["#TEMP8"], %["#TEMP8"], 21000 \n\t"
[all...] |
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| asm.h | 110 #define INT_ADDIU addiu
150 #define LONG_ADDIU addiu
200 #define PTR_ADDIU addiu
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
| asm.h | 110 #define INT_ADDIU addiu
150 #define LONG_ADDIU addiu
200 #define PTR_ADDIU addiu
|
