| /external/llvm/test/MC/Disassembler/Mips/ |
| mips32_le.txt | 35 # CHECK: bc1f 1332
38 # CHECK: bc1f $fcc7, 1332
|
| mips32r2.txt | 35 # CHECK: bc1f 1332
38 # CHECK: bc1f $fcc7, 1332
|
| mips32r2_le.txt | 35 # CHECK: bc1f 1332
38 # CHECK: bc1f $fcc7, 1332
|
| /external/llvm/test/MC/Mips/ |
| micromips-fpu-instructions.s | 24 # CHECK-EL: bc1f 1332 # encoding: [0x80,0x43,0x9a,0x02]
87 # CHECK-EB: bc1f 1332 # encoding: [0x43,0x80,0x02,0x9a]
148 bc1f 1332
|
| mips-fpu-instructions.s | 141 # CHECK: bc1f $BB_1 # encoding: [A,A,0x00,0x45]
178 bc1f $fcc0, $BB_1
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEInstrInfo.cpp | 354 case Mips::BC1T: return Mips::BC1F;
355 case Mips::BC1F: return Mips::BC1T;
425 Opc == Mips::BC1T || Opc == Mips::BC1F || Opc == Mips::B ||
|
| MipsInstrFPU.td | 527 def BC1F : MMRel, BC1F_FT<"bc1f", brtarget, IIBranch, MIPS_BRANCH_F>,
596 def : MipsInstAlias<"bc1f $offset", (BC1F FCC0, brtarget:$offset)>,
|
| /external/chromium_org/third_party/webrtc/modules/audio_processing/aec/ |
| aec_core_mips.c | 168 "bc1f 4f \n\t"
171 "bc1f 3f \n\t"
230 "bc1f 5f \n\t"
[all...] |
| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips32r2.s | 8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| invalid-mips4.s | 8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| invalid-mips5.s | 8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /external/chromium_org/v8/src/mips/ |
| assembler-mips.h | 939 void bc1f(Label* L, uint16_t cc = 0) { bc1f(branch_offset(L, false)>>2, cc); } function in class:v8::internal::Assembler
[all...] |
| disasm-mips.cc | 865 Format(instr, "bc1f 'bc, 'imm16u");
[all...] |
| macro-assembler-mips.cc | [all...] |
| assembler-mips.cc | 2312 void Assembler::bc1f(int16_t offset, uint16_t cc) { function in class:v8::Assembler
[all...] |
| /external/chromium_org/v8/src/mips64/ |
| assembler-mips64.h | 971 void bc1f(Label* L, uint16_t cc = 0) { function in class:v8::internal::Assembler
[all...] |
| disasm-mips64.cc | 985 Format(instr, "bc1f 'bc, 'imm16u");
[all...] |
| macro-assembler-mips64.cc | [all...] |
| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips4.s | 8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| invalid-mips5.s | 8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /external/valgrind/main/coregrind/m_gdbserver/ |
| valgrind-low-mips32.c | 182 && (rs == 8 /* BC1F, BC1FL, BC1T, BC1TL: 010001 01000 */
|
| valgrind-low-mips64.c | 183 && (rs == 8 /* BC1F, BC1FL, BC1T, BC1TL: 010001 01000 */
|
| /external/pcre/dist/sljit/ |
| sljitNativeMIPS_common.c | 106 #define BC1F (HI(17) | (8 << 21))
[all...] |
| /external/chromium_org/v8/test/cctest/ |
| test-assembler-mips.cc | 571 __ bc1f(&neither_is_nan);
[all...] |
| test-assembler-mips64.cc | 576 __ bc1f(&neither_is_nan);
[all...] |
