/external/llvm/test/MC/Disassembler/Mips/ |
mips32r2_le.txt | 41 # CHECK: bc1t 1332 44 # CHECK: bc1t $fcc7, 1332
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/external/llvm/test/MC/Mips/ |
micromips-fpu-instructions.s | 26 # CHECK-EL: bc1t 1332 # encoding: [0xa0,0x43,0x9a,0x02] 89 # CHECK-EB: bc1t 1332 # encoding: [0x43,0xa0,0x02,0x9a] 149 bc1t 1332
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/external/llvm/lib/Target/Mips/ |
MipsSEInstrInfo.cpp | 354 case Mips::BC1T: return Mips::BC1F; 355 case Mips::BC1F: return Mips::BC1T; 425 Opc == Mips::BC1T || Opc == Mips::BC1F || Opc == Mips::B ||
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MipsInstrFPU.td | 529 def BC1T : MMRel, BC1F_FT<"bc1t", brtarget, IIBranch, MIPS_BRANCH_T>, 594 def : MipsInstAlias<"bc1t $offset", (BC1T FCC0, brtarget:$offset)>,
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/external/llvm/test/MC/Mips/mips2/ |
invalid-mips32r2.s | 9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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invalid-mips4.s | 9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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invalid-mips5.s | 9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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/external/chromium_org/v8/src/mips/ |
assembler-mips.h | 941 void bc1t(Label* L, uint16_t cc = 0) { bc1t(branch_offset(L, false)>>2, cc); } function in class:v8::internal::Assembler [all...] |
disasm-mips.cc | 215 // Print the integer value of the cc field for the bc1t/f instructions. 863 Format(instr, "bc1t 'bc, 'imm16u"); [all...] |
macro-assembler-mips.cc | [all...] |
assembler-mips.cc | 2319 void Assembler::bc1t(int16_t offset, uint16_t cc) { function in class:v8::Assembler [all...] |
/external/chromium_org/v8/src/mips64/ |
assembler-mips64.h | 975 void bc1t(Label* L, uint16_t cc = 0) { function in class:v8::internal::Assembler [all...] |
disasm-mips64.cc | 216 // Print the integer value of the cc field for the bc1t/f instructions. 983 Format(instr, "bc1t 'bc, 'imm16u"); [all...] |
macro-assembler-mips64.cc | [all...] |
assembler-mips64.cc | 2546 void Assembler::bc1t(int16_t offset, uint16_t cc) { function in class:v8::Assembler [all...] |
/external/llvm/test/MC/Mips/mips1/ |
invalid-mips4.s | 9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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invalid-mips5.s | 9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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/external/valgrind/main/coregrind/m_gdbserver/ |
valgrind-low-mips32.c | 182 && (rs == 8 /* BC1F, BC1FL, BC1T, BC1TL: 010001 01000 */
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valgrind-low-mips64.c | 183 && (rs == 8 /* BC1F, BC1FL, BC1T, BC1TL: 010001 01000 */
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/external/pcre/dist/sljit/ |
sljitNativeMIPS_common.c | 107 #define BC1T (HI(17) | (8 << 21) | (1 << 16)) [all...] |
/external/chromium_org/v8/test/cctest/ |
test-assembler-mips.cc | 584 __ bc1t(&less_than); 590 __ bc1t(&less_than, 2); [all...] |
test-assembler-mips64.cc | 592 __ bc1t(&less_than, 2); [all...] |
/external/chromium_org/third_party/webrtc/modules/audio_processing/aec/ |
aec_core_mips.c | [all...] |
/external/llvm/lib/Target/Mips/AsmParser/ |
MipsAsmParser.cpp | 934 case Mips::BC1T: [all...] |
/external/qemu/disas/ |
mips.c | [all...] |