| /external/libhevc/common/arm/ |
| ihevc_deblk_luma_horz.s | 67 add r7,r3,r5,lsl #1
68 add r3,r3,r6,lsl #1
78 add r3,r3,r2,lsl #1
97 ldr r5,[r2,r7,lsl #2] @ beta
98 ldr r6,[r4,r3,lsl #2] @ tc
105 lsl r7,r6,#1
106 add r14,r1,r1,lsl #1
109 ldr r10,[r0,-r1,lsl #1] @-2 value
120 ldr r2,[r0,r1,lsl #1] @ 2 value
128 subs r9,r12,r9,lsl #1 @ dq0 value is stored in r
[all...] |
| ihevc_inter_pred_chroma_vert_w16inp_w16out.s | 111 lsl r2,r2,#1 @src_strd = 2* src_strd
129 lsl r7,r2,#1 @2*src_strd
130 lsl r3,r3,#1 @2*dst_strd
131 lsl r9,r6,#2 @4*wd
132 sub r6,r3,r6,lsl #1 @2*dst_strd - 2*wd
161 add r1,r1,r6,lsl #1 @pu1_dst += 2*dst_strd - 2*wd
169 lsl r7,r2,#2 @2*src_strd
170 lsl r10,r3,#2 @2*dst_strd
172 sub lr,r10,r6,lsl #1 @2*dst_strd - 2*wd
173 sub r8,r7,r6,lsl #2 @2*src_strd - 4*w
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-fold-lsl.ll | 12 ; CHECK: ldrh w0, [x0, [[REG]], lsl #1]
24 ; CHECK: ldr w0, [x0, [[REG]], lsl #2]
36 ; CHECK: ldr x0, [x0, [[REG]], lsl #3]
48 ; CHECK: strh w2, [x0, [[REG]], lsl #1]
60 ; CHECK: str w2, [x0, [[REG]], lsl #2]
72 ; CHECK: str x2, [x0, [[REG]], lsl #3]
|
| arm64-addrmode.ll | 40 ; CHECK: add [[ADDREG:x[0-9]+]], x{{[0-9]+}}, #8, lsl #12
52 ; CHECK: ldr xzr, [x{{[0-9]+}}, x{{[0-9]+}}, lsl #3]
62 ; CHECK: add [[ADDREG:x[0-9]+]], x{{[0-9]+}}, x{{[0-9]+}}, lsl #3
63 ; CHECK-NEXT: add [[ADDREG]], [[ADDREG]], #8, lsl #12
|
| /external/llvm/test/CodeGen/ARM/ |
| long_shift.ll | 22 ; CHECK-LE: lsl{{.*}}r2
23 ; CHECK-BE: lsl{{.*}}r3
34 ; CHECK-LE-NEXT: orr r0, r0, r1, lsl r3
40 ; CHECK-BE-NEXT: orr r1, r1, r0, lsl r2
55 ; CHECK-LE-NEXT: orr r0, r0, r1, lsl r3
61 ; CHECK-BE-NEXT: orr r1, r1, r0, lsl r2
|
| /external/llvm/test/MC/ARM/ |
| thumb-shift-encoding.s | 10 sbc.w r3, r6, r10, lsl #0
11 sbc.w r4, r5, lr, lsl #16
21 @ CHECK: sbc.w r4, r5, lr, lsl #16 @ encoding: [0x65,0xeb,0x0e,0x44]
30 and.w r3, r6, r10, lsl #0
31 and.w r4, r5, lr, lsl #16
41 @ CHECK: and.w r4, r5, lr, lsl #16 @ encoding: [0x05,0xea,0x0e,0x44]
|
| /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV5E/ |
| CalcWindowEnergy_v5.s | 32 mov r3, r3, lsl #16
37 mov r2, r2, lsl #16
55 mov r9, r5, lsl #1
63 mov r3, r3, lsl #1
64 mov r8, r8, lsl #1
90 add r4, r0, r8, lsl #2
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s | 216 SUB pQ0, pQ0, srcdstStep, LSL #1
224 AND tunpk6, mask, row0, LSL#8
228 AND tunpk3, mask, row2, LSL#8
239 PKHBT p_2, tunpk2, tunpk0, LSL#16
240 PKHBT p_3, tunpk3, tunpk6, LSL#16
271 AND tunpk5, mask, row4, LSL#8
275 AND tunpk7, mask, row6, LSL#8
286 PKHBT q_1, tunpk6, tunpk4, LSL#16
288 PKHBT q_0, tunpk7, tunpk5, LSL#16
343 ORR apqflg, apflg, t1, LSL #
[all...] |
| armVCM4P10_InterpolateLuma_Align_unsafe_s.s | 108 ORR x0, x0, x1, LSL #24
110 ORR x1, x1, x2, LSL #24
124 ORR x0, x0, x1, LSL #16
126 ORR x1, x1, x2, LSL #16
140 ORR x0, x0, x1, LSL #8
142 ORR x1, x1, x2, LSL #8
208 MOV x1, x1, LSL #24
221 MOV x1, x1, LSL #16
234 MOV x1, x1, LSL #8
|
| /external/chromium_org/third_party/libvpx/source/libvpx/vp8/common/arm/armv6/ |
| idct_v6.asm | 49 pkhbt r8, r8, r10, lsl #16 ; 5s | 4s
60 pkhbt r10, r10, r7, lsl #16 ; 13s | 12s
96 pkhbt r11, r6, r0, lsl #16 ; i0 | i4
99 pkhbt r8, r10, r8, lsl #16 ; 1s | 5s = temp1
102 pkhbt r9, r14, r12, lsl #16 ; i2 | i6
115 pkhbt r11, r14, r11, lsl #16 ; 3s | 7s = temp1
147 add r0, r0, r11, lsl #8 ; |--|--|d1|d0|
151 add r0, r0, r12, lsl #16 ; |--|d2|d1|d0|
163 add r0, r0, r11, lsl #24 ; |d3|d2|d1|d0|
178 add r12, r12, r11, lsl #8 ; |--|--|d5|d4
[all...] |
| sixtappredict8x4_v6.asm | 36 sub r0, r0, r1, lsl #1
41 add r2, r12, r2, lsl #4 ;calculate filter location
61 pkhbt r6, r6, r7, lsl #16 ; r7 | r6
62 pkhbt r7, r7, r8, lsl #16 ; r8 | r7
64 pkhbt r8, r8, r9, lsl #16 ; r9 | r8
65 pkhbt r9, r9, r10, lsl #16 ; r10 | r9
77 pkhbt r10, r10, r6, lsl #16 ; r10 | r9
78 pkhbt r6, r6, r7, lsl #16 ; r11 | r10
131 add lr, r12, r3, lsl #4 ;calculate filter location
183 sub r0, r0, r1, lsl #
[all...] |
| /external/chromium_org/third_party/libvpx/source/libvpx/vp9/common/arm/neon/ |
| vp9_convolve8_avg_neon.asm | 69 sub r8, r1, r1, lsl #2 ; -src_stride * 3
72 sub r4, r3, r3, lsl #2 ; -dst_stride * 3
75 rsb r9, r6, r1, lsl #2 ; reset src for outer loop
77 rsb r12, r6, r3, lsl #2 ; reset dst for outer loop
91 pld [r0, r1, lsl #2]
126 pld [r5, r1, lsl #1]
134 sub r2, r2, r3, lsl #2 ; reset for store
195 sub r0, r0, r1, lsl #1
203 lsl r1, r1, #1
204 lsl r3, r3, #
[all...] |
| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| idct_v6.asm | 49 pkhbt r8, r8, r10, lsl #16 ; 5s | 4s
60 pkhbt r10, r10, r7, lsl #16 ; 13s | 12s
96 pkhbt r11, r6, r0, lsl #16 ; i0 | i4
99 pkhbt r8, r10, r8, lsl #16 ; 1s | 5s = temp1
102 pkhbt r9, r14, r12, lsl #16 ; i2 | i6
115 pkhbt r11, r14, r11, lsl #16 ; 3s | 7s = temp1
147 add r0, r0, r11, lsl #8 ; |--|--|d1|d0|
151 add r0, r0, r12, lsl #16 ; |--|d2|d1|d0|
163 add r0, r0, r11, lsl #24 ; |d3|d2|d1|d0|
178 add r12, r12, r11, lsl #8 ; |--|--|d5|d4
[all...] |
| sixtappredict8x4_v6.asm | 36 sub r0, r0, r1, lsl #1
41 add r2, r12, r2, lsl #4 ;calculate filter location
61 pkhbt r6, r6, r7, lsl #16 ; r7 | r6
62 pkhbt r7, r7, r8, lsl #16 ; r8 | r7
64 pkhbt r8, r8, r9, lsl #16 ; r9 | r8
65 pkhbt r9, r9, r10, lsl #16 ; r10 | r9
77 pkhbt r10, r10, r6, lsl #16 ; r10 | r9
78 pkhbt r6, r6, r7, lsl #16 ; r11 | r10
131 add lr, r12, r3, lsl #4 ;calculate filter location
183 sub r0, r0, r1, lsl #
[all...] |
| /external/libvpx/libvpx/vp9/common/arm/neon/ |
| vp9_convolve8_avg_neon.asm | 69 sub r8, r1, r1, lsl #2 ; -src_stride * 3
72 sub r4, r3, r3, lsl #2 ; -dst_stride * 3
75 rsb r9, r6, r1, lsl #2 ; reset src for outer loop
77 rsb r12, r6, r3, lsl #2 ; reset dst for outer loop
91 pld [r0, r1, lsl #2]
126 pld [r5, r1, lsl #1]
134 sub r2, r2, r3, lsl #2 ; reset for store
195 sub r0, r0, r1, lsl #1
203 lsl r1, r1, #1
204 lsl r3, r3, #
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| omxVCM4P10_TransformDequantChromaDCFromPair_s.S | 41 and r7, r8, r6, lsl #1
43 orrne r4, r4, r5, lsl #8
60 lsl r2, r2, r9
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/ |
| idct_v6.asm | 49 pkhbt r8, r8, r10, lsl #16 ; 5s | 4s
60 pkhbt r10, r10, r7, lsl #16 ; 13s | 12s
96 pkhbt r11, r6, r0, lsl #16 ; i0 | i4
99 pkhbt r8, r10, r8, lsl #16 ; 1s | 5s = temp1
102 pkhbt r9, r14, r12, lsl #16 ; i2 | i6
115 pkhbt r11, r14, r11, lsl #16 ; 3s | 7s = temp1
147 add r0, r0, r11, lsl #8 ; |--|--|d1|d0|
151 add r0, r0, r12, lsl #16 ; |--|d2|d1|d0|
163 add r0, r0, r11, lsl #24 ; |d3|d2|d1|d0|
178 add r12, r12, r11, lsl #8 ; |--|--|d5|d4
[all...] |
| sixtappredict8x4_v6.asm | 36 sub r0, r0, r1, lsl #1
41 add r2, r12, r2, lsl #4 ;calculate filter location
61 pkhbt r6, r6, r7, lsl #16 ; r7 | r6
62 pkhbt r7, r7, r8, lsl #16 ; r8 | r7
64 pkhbt r8, r8, r9, lsl #16 ; r9 | r8
65 pkhbt r9, r9, r10, lsl #16 ; r10 | r9
77 pkhbt r10, r10, r6, lsl #16 ; r10 | r9
78 pkhbt r6, r6, r7, lsl #16 ; r11 | r10
131 add lr, r12, r3, lsl #4 ;calculate filter location
183 sub r0, r0, r1, lsl #
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/arm/neon/ |
| vp9_convolve8_avg_neon.asm | 69 sub r8, r1, r1, lsl #2 ; -src_stride * 3
72 sub r4, r3, r3, lsl #2 ; -dst_stride * 3
75 rsb r9, r6, r1, lsl #2 ; reset src for outer loop
77 rsb r12, r6, r3, lsl #2 ; reset dst for outer loop
91 pld [r0, r1, lsl #2]
126 pld [r5, r1, lsl #1]
134 sub r2, r2, r3, lsl #2 ; reset for store
195 sub r0, r0, r1, lsl #1
203 lsl r1, r1, #1
204 lsl r3, r3, #
[all...] |
| /bionic/libc/arch-arm/cortex-a9/bionic/ |
| memset.S | 97 movs ip, r2, lsl #29
102 2: movs ip, r2, lsl #31
129 mov r1, r1, lsl #24
133 movs r12, r3, lsl #31
157 movs r3, r3, lsl #28
161 movs r3, r3, lsl #2
174 movs r2, r2, lsl #28
177 movs r2, r2, lsl #2
180 movs r2, r2, lsl #2
|
| /external/llvm/test/MC/AArch64/ |
| arm64-leaf-compact-unwind.s | 65 str w9, [x8, x9, lsl #2]
150 sub w8, w8, w7, lsl #1
151 sub w8, w8, w6, lsl #1
152 sub w8, w8, w5, lsl #1
153 sub w8, w8, w4, lsl #1
154 sub w8, w8, w3, lsl #1
155 sub w8, w8, w2, lsl #1
156 sub w0, w8, w1, lsl #1
185 str w11, [x8, x9, lsl #2]
|
| /external/skia/src/core/asm/ |
| s32a_d565_opaque.S | 40 mov r2, r1, lsl #8
50 mov r3, r1, lsl #16
77 mov r2, ip, lsl #5
79 orr ip, r2, r1, lsl #11
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| armVCM4P10_InterpolateLuma_Align_unsafe_s.s | 108 ORR x0, x0, x1, LSL #24
110 ORR x1, x1, x2, LSL #24
124 ORR x0, x0, x1, LSL #16
126 ORR x1, x1, x2, LSL #16
140 ORR x0, x0, x1, LSL #8
142 ORR x1, x1, x2, LSL #8
208 MOV x1, x1, LSL #24
221 MOV x1, x1, LSL #16
234 MOV x1, x1, LSL #8
|
| /frameworks/native/opengl/libagl/ |
| fixed_asm.S | 36 movs r1, r0, lsl #1 /* remove bit sign */
39 mov r2, r0, lsl #8 /* mantissa<<8 */
51 mov r1, r0, lsl #1 /* remove bit sign */
55 mov r2, r0, lsl #8 /* mantissa<<8 */
|
| /external/tremolo/Tremolo/ |
| bitwiseARM.s | 60 ORRLT r10,r10,r11,LSL r14 @ r10= Next 32 bits.
62 RSB r14,r14,r14,LSL r1
82 ORRLT r10,r10,r6,LSL r12 @ r10= first bitsLeftInSeg bits+crap
83 RSB r11,r11,r11,LSL r5 @ r11= mask
108 ORR r10,r10,r12,LSL r5 @ r10= first r5+8 bits
114 RSB r14,r14,r14,LSL r1
123 RSB r14,r14,r14,LSL r1
150 MOV r14,r14,LSL #3 @ r14= length in bits
194 MOV r10,r10,LSL #3 @ r10= bits to backtrk to word align
200 ADDS r2,r2,r12,LSL #3 @ r2 = length in bits after advanc
[all...] |
