| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/ |
| vp8_variance8x8_armv6.asm | 27 pld [r0, r1, lsl #0]
28 pld [r2, r3, lsl #0]
42 pld [r0, r1, lsl #1]
45 pld [r2, r3, lsl #1]
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/neon/ |
| loopfiltersimplehorizontaledge_neon.asm | 26 sub r3, r0, r1, lsl #1 ; move src pointer down by 2 lines
97 add r0, r0, r1, lsl #2 ; src = y_ptr + 4 * y_stride
100 add r0, r0, r1, lsl #2 ; src = y_ptr + 8* y_stride
102 add r0, r0, r1, lsl #2 ; src = y_ptr + 12 * y_stride
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/armv5te/ |
| vp8_packtokens_partitions_armv5.asm | 113 add r4, r4, r6, lsl #3 ; a = vp8_coef_encodings + t
130 lsl r12, r6, r4 ; r12 = v << 32 - n
161 lsl r5, r4, r6 ; range <<= shift
192 lsl r2, r2, r6 ; lowvalue <<= offset
209 lsl r2, r2, r6 ; lowvalue <<= shift
218 add r12, r7, r6, lsl #4 ; b = vp8_extra_bits + t
237 lsl r12, r7, r4
259 lsl r5, r4, r6 ; range <<= shift
290 lsl r2, r2, r6 ; lowvalue <<= offset
302 lsl r2, r2, r
[all...] |
| /external/llvm/test/MC/Disassembler/ARM/ |
| arm-tests.txt | 63 # CHECK: ldr r5, [r7, -r10, lsl #2]
112 # CHECK: pkhbt r8, r9, r10, lsl #4
115 # CHECK-NOT: pkhbtls r10, r11, r11, lsl #0
140 # CHECK-NOT: rsbeq r0, r2, r0, lsl #0
144 # CHECK-NOT: rscseq r0, r0, r1, lsl #0
154 # CHECK: ssat r8, #1, r10, lsl #8
157 # CHECK-NOT: ssatmi r0, #17, r12, lsl #0
221 # CHECK: ldr r5, [sp, r0, lsl #1]!
233 # CHECK: ldrbt r3, [r4], -r5, lsl #12
266 # CHECK: pli [r3, r1, lsl #2
[all...] |
| /external/tremolo/Tremolo/ |
| asm_arm.h | 60 "adc %1, %0, %1, lsl #17\n\t"
158 "add r0,r0,r1,lsl#3;"
174 "orr %0,%0,r2,lsl #16;"
176 "orr %1,%1,r3,lsl #16;"
184 "add r0,%3,%5,lsl#2;\n"
198 "orr %0,%0,r2,lsl #16;\n"
200 "orr %1,%1,r3,lsl #16;\n"
245 "moveq %0,%0,lsl #8;"
248 "moveq %0,%0,lsl #4;"
251 "moveq %0,%0,lsl #2;
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| Syn_filt_32_opt.s | 56 ORR r10, r6, r7, LSL #16 @ Aq[2] -- Aq[1]
57 ORR r11, r8, r9, LSL #16 @ Aq[4] -- Aq[3]
67 ORR r10, r6, r7, LSL #16 @ Aq[6] -- Aq[5]
68 ORR r11, r8, r9, LSL #16 @ Aq[8] -- Aq[7]
78 ORR r10, r6, r7, LSL #16 @ Aq[10] -- Aq[9]
79 ORR r11, r8, r9, LSL #16 @ Aq[12] -- Aq[11]
89 ORR r10, r6, r7, LSL #16 @ Aq[14] -- Aq[13]
90 ORR r11, r8, r9, LSL #16 @ Aq[16] -- Aq[15]
146 ADD r14, r14, r7, LSL #1 @ L_tmp += (exc[i] * a0) << 1
207 MOV r14, r14, LSL #3 @ L_tmp <<=
[all...] |
| /bionic/libc/arch-arm64/generic/bionic/ |
| strncmp.S | 104 lsl limit, limit, #3 /* Bits -> bytes. */
109 lsl mask, mask, limit
129 lsl data1, data1, pos
130 lsl data2, data2, pos
161 lsl data1, data1, pos
162 lsl data2, data2, pos
179 neg tmp3, tmp1, lsl #3 /* 64 - bits(bytes beyond align). */
185 lsl tmp2, tmp2, tmp3 /* Shift (tmp1 & 63). */
|
| memcmp.S | 83 lsl limit, limit, #3 /* Bits -> bytes. */
88 lsl mask, mask, limit
106 lsl data1, data1, pos
107 lsl data2, data2, pos
121 lsl tmp1, tmp1, #3 /* Bytes beyond alignment -> bits. */
128 lsl tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */
|
| strcmp.S | 90 lsl data1, data1, pos
91 lsl data2, data2, pos
122 lsl data1, data1, pos
123 lsl data2, data2, pos
137 lsl tmp1, tmp1, #3 /* Bytes beyond alignment -> bits. */
144 lsl tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */
|
| /external/chromium_org/v8/src/compiler/arm/ |
| instruction-codes-arm.h | 75 V(Operand2_R_LSL_I) /* %r0 LSL K */ \
79 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \
|
| /external/linux-tools-perf/perf-3.12.0/arch/avr32/lib/ |
| memcpy.S | 40 lsl r10, 2
55 lsl r9, 2
|
| /external/llvm/test/CodeGen/ARM/ |
| fast-isel-shifter.ll | 7 ; ARM: lsl r0, r0, #2
15 ; ARM: lsl r0, r0, r1
|
| /frameworks/av/media/libstagefright/codecs/mp3dec/src/asm/ |
| pvmp3_dct_9_gcc.s | 73 mov r9,r1,lsl #1
86 mov r1,r12,lsl #1
109 mov r1,r6,lsl #1
118 mov r1,r5,lsl #1
124 mov r2,r4,lsl #1
128 mov r3,r3,lsl #1
134 mov r12,lr,lsl #1
140 mov lr,lr,lsl #1
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| omxVCM4P10_FilterDeblockingLuma_HorEdge_I_s.s | 178 SUB pQ0, pQ0, srcdstStep, LSL #2
245 ORR apqflg, apflg, t1, LSL #1
263 STR Q2b, [pQ0b, Stepb, LSL #1]
267 SUB pQ0, pQ0b, Stepb, LSL #2
279 SUB pQ0, pQ0, srcdstStep, LSL #3
311 M_STR P1a, [pQ0a, Stepa, LSL #1]!
320 SUB pQ0, pQ0a, Stepa, LSL #2
332 ADD pQ0, pQ0, srcdstStep, LSL #2
|
| /external/chromium_org/third_party/opus/src/celt/arm/ |
| kiss_fft_armv4.h | 52 "orr %[mi], %[tt], %[mi], lsl #17\n\t" \
54 "orr %[mr], %[br], %[mr], lsl #17\n\t" \
80 "orr %[mi], %[tt], %[mi], lsl #15\n\t" \
82 "orr %[mr], %[br], %[mr], lsl #15\n\t" \
108 "orr %[mr], %[tt], %[mr], lsl #17\n\t" \
110 "orr %[mi], %[br], %[mi], lsl #17\n\t" \
|
| /external/libhevc/common/arm/ |
| ihevc_deblk_chroma_vert.s | 81 ldrle r3,[r7,r3,lsl #2]
89 ldrle r2,[r7,r2,lsl #2]
93 add r3,r3,r5,lsl #1
109 add r2,r2,r5,lsl #1
113 ldr r3,[r6,r3,lsl #2]
125 ldr r2,[r6,r2,lsl #2]
|
| ihevc_intra_pred_filters_chroma_mode_11_to_17.s | 137 add r7, r7, r5, lsl #2 @gai4_ihevc_ang_table[mode]
138 add r8, r8, r5, lsl #2 @gai4_ihevc_inv_ang_table[mode - 11]
145 add r6, sp, r4, lsl #1 @ref_temp + 2 * nt
151 add r1, r0, r4, lsl #2 @r1 = &src[4nt]
226 add r6, sp, r4, lsl #1 @ref_temp + 2 * nt
233 add r1, r0, r4, lsl #2 @r1 = &src[4nt]
242 mov r0,r0, lsl #1
261 mov r11, r4, lsl #1 @col counter to be inc/dec by #8
269 add r12, r12, r7, lsl #4
273 sub r7, r7, r3, lsl #3 @r7 = 8-8r
[all...] |
| /external/libhevc/common/arm64/ |
| ihevc_deblk_chroma_horz.s | 90 ldr w1, [x3,x1,lsl #2]
100 ldr w2, [x3,x2,lsl #2]
105 add x1,x1,x4,lsl #1
123 add x2,x2,x4,lsl #1
126 ldr w1, [x3,x1,lsl #2]
139 ldr w2, [x3,x2,lsl #2]
|
| ihevc_deblk_luma_horz.s | 67 add x7,x3,x5,lsl #1
68 add x3,x3,x6,lsl #1
80 add x3,x3,x2,lsl #1
100 ldr w5, [x2,x7,lsl #2] // beta
101 ldr w6, [x4,x3,lsl #2] // tc
108 lsl x7,x6,#1
109 add x14,x1,x1,lsl #1
113 lsl x19,x1,#1
127 lsl x19,x1,#1
136 subs x9,x12,x9,lsl #1 // dq0 value is stored in x
[all...] |
| /external/libopus/celt/arm/ |
| kiss_fft_armv4.h | 52 "orr %[mi], %[tt], %[mi], lsl #17\n\t" \
54 "orr %[mr], %[br], %[mr], lsl #17\n\t" \
80 "orr %[mi], %[tt], %[mi], lsl #15\n\t" \
82 "orr %[mr], %[br], %[mr], lsl #15\n\t" \
108 "orr %[mr], %[tt], %[mr], lsl #17\n\t" \
110 "orr %[mi], %[br], %[mi], lsl #17\n\t" \
|
| /external/chromium_org/v8/test/cctest/ |
| test-disasm-arm64.cc | 118 COMPARE(dci(0x531b6800), "lsl w0, w0, #5");
120 COMPARE(dci(0x72af0f00), "movk w0, #0x7878, lsl #16");
140 COMPARE(Mov(w6, Operand(w7, LSL, 5)), "lsl w6, w7, #5");
160 COMPARE(Mvn(w6, Operand(w7, LSL, 12)), "mvn w6, w7, lsl #12");
179 COMPARE(movk(x8, 0xabcd0000), "movk x8, #0xabcd, lsl #16");
180 COMPARE(movk(x9, 0x555500000000), "movk x9, #0x5555, lsl #32");
181 COMPARE(movk(x10, 0xaaaa000000000000), "movk x10, #0xaaaa, lsl #48");
182 COMPARE(movk(w11, 0xabcd, 16), "movk w11, #0xabcd, lsl #16")
[all...] |
| /external/vixl/test/ |
| test-disasm-a64.cc | 94 COMPARE(dci(0x531b6800), "lsl w0, w0, #5");
96 COMPARE(dci(0x72af0f00), "movk w0, #0x7878, lsl #16");
115 COMPARE(Mov(w6, Operand(w7, LSL, 5)), "lsl w6, w7, #5");
126 COMPARE(Mvn(w6, Operand(w7, LSL, 12)), "mvn w6, w7, lsl #12");
144 COMPARE(movk(x8, 0xabcd0000), "movk x8, #0xabcd, lsl #16");
145 COMPARE(movk(x9, 0x555500000000), "movk x9, #0x5555, lsl #32");
146 COMPARE(movk(x10, 0xaaaa000000000000), "movk x10, #0xaaaa, lsl #48");
147 COMPARE(movk(w11, 0xabcd, 16), "movk w11, #0xabcd, lsl #16")
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/api/ |
| armCOMM_IDCT_s.h | 251 PKHBT xi4, xi3, xi4, LSL #(16-SHIFT)
256 PKHBT xi5, xi0, xi5, LSL #(16-SHIFT)
260 PKHBT xi6, xi1, xi6, LSL #(16-SHIFT)
262 PKHBT xi7, xi2, xi7, LSL #(16-SHIFT)
276 PKHBT xi4, xi0, xi1, LSL #(16-SHIFT)
278 PKHBT xi5, xi2, xi3, LSL #(16-SHIFT)
288 PKHBT xi6, xi0, xi1, LSL #(16-SHIFT)
290 PKHBT xi7, xi2, xi3, LSL #(16-SHIFT)
322 PKHBT xi0, xi7, xi0, LSL #(16-SHIFT)
327 PKHBT xi1, xi4, xi1, LSL #(16-SHIFT
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/api/ |
| armCOMM_IDCT_s.h | 251 PKHBT xi4, xi3, xi4, LSL #(16-SHIFT)
256 PKHBT xi5, xi0, xi5, LSL #(16-SHIFT)
260 PKHBT xi6, xi1, xi6, LSL #(16-SHIFT)
262 PKHBT xi7, xi2, xi7, LSL #(16-SHIFT)
276 PKHBT xi4, xi0, xi1, LSL #(16-SHIFT)
278 PKHBT xi5, xi2, xi3, LSL #(16-SHIFT)
288 PKHBT xi6, xi0, xi1, LSL #(16-SHIFT)
290 PKHBT xi7, xi2, xi3, LSL #(16-SHIFT)
322 PKHBT xi0, xi7, xi0, LSL #(16-SHIFT)
327 PKHBT xi1, xi4, xi1, LSL #(16-SHIFT
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-patchpoint.ll | 8 ; CHECK: movz x16, #0xdead, lsl #32
9 ; CHECK-NEXT: movk x16, #0xbeef, lsl #16
12 ; CHECK: movz x16, #0xdead, lsl #32
13 ; CHECK-NEXT: movk x16, #0xbeef, lsl #16
54 ; CHECK-NEXT: movz x16, #0xffff, lsl #32
55 ; CHECK-NEXT: movk x16, #0xdead, lsl #16
77 ; CHECK-NEXT: movz x16, #0xffff, lsl #32
78 ; CHECK-NEXT: movk x16, #0xdead, lsl #16
102 ; CHECK-NEXT: movz x16, #0xffff, lsl #32
103 ; CHECK-NEXT: movk x16, #0xdead, lsl #1
[all...] |
