| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/ |
| dequant_idct_v6.asm | 69 pkhbt r7, r7, r9, lsl #16
71 pkhbt r8, r8, r10, lsl #16
77 pkhbt r9, r9, r11, lsl #16
79 pkhbt r10, r10, r7, lsl #16
107 pkhbt r11, r8, r6, lsl #16
108 pkhbt r1, lr, r1, lsl #16
109 pkhbt r12, r10, r12, lsl #16
112 pkhbt lr, r9, r7, lsl #16
121 pkhbt r1, r7, r1, lsl #16
123 pkhbt r11, r9, r11, lsl #1
[all...] |
| dc_only_idct_add_v6.asm | 31 orr r0, r0, r0, lsl #16 ; a1 | a1
43 orr r5, r5, r4, lsl #8
44 orr r7, r7, r6, lsl #8
58 orr r5, r5, r4, lsl #8
59 orr r7, r7, r6, lsl #8
|
| /external/chromium_org/third_party/libvpx/source/libvpx/vp9/common/arm/neon/ |
| vp9_copy_neon.asm | 34 pld [r0, r1, lsl #1]
44 pld [r0, r1, lsl #1]
46 pld [r0, r1, lsl #1]
55 pld [r0, r1, lsl #1]
57 pld [r0, r1, lsl #1]
66 pld [r0, r1, lsl #1]
68 pld [r0, r1, lsl #1]
|
| /external/libvpx/libvpx/vp9/common/arm/neon/ |
| vp9_copy_neon.asm | 34 pld [r0, r1, lsl #1]
44 pld [r0, r1, lsl #1]
46 pld [r0, r1, lsl #1]
55 pld [r0, r1, lsl #1]
57 pld [r0, r1, lsl #1]
66 pld [r0, r1, lsl #1]
68 pld [r0, r1, lsl #1]
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/arm/neon/ |
| vp9_copy_neon.asm | 34 pld [r0, r1, lsl #1]
44 pld [r0, r1, lsl #1]
46 pld [r0, r1, lsl #1]
55 pld [r0, r1, lsl #1]
57 pld [r0, r1, lsl #1]
66 pld [r0, r1, lsl #1]
68 pld [r0, r1, lsl #1]
|
| /system/core/libpixelflinger/tests/arch-arm64/disassembler/ |
| arm64_diassembler_test.cpp | 41 { 0x91000240, "add x0, x18, #0x0, lsl #0" },
42 { 0x9140041f, "add sp, x0, #0x1, lsl #12" },
43 { 0x917ffff2, "add x18, sp, #0xfff, lsl #12" },
45 { 0xd13ffe40, "sub x0, x18, #0xfff, lsl #0" },
46 { 0xd140001f, "sub sp, x0, #0x0, lsl #12" },
47 { 0xd14007f2, "sub x18, sp, #0x1, lsl #12" },
49 { 0x8b1e0200, "add x0, x16, x30, lsl #0" },
55 { 0x4b1e0200, "sub w0, w16, w30, lsl #0" },
60 { 0x6b1e0200, "subs w0, w16, w30, lsl #0" },
65 { 0x0a1e0200, "and w0, w16, w30, lsl #0" }
[all...] |
| /external/chromium_org/third_party/libvpx/source/libvpx/vp8/common/arm/armv6/ |
| dc_only_idct_add_v6.asm | 31 orr r0, r0, r0, lsl #16 ; a1 | a1
43 orr r5, r5, r4, lsl #8
44 orr r7, r7, r6, lsl #8
58 orr r5, r5, r4, lsl #8
59 orr r7, r7, r6, lsl #8
|
| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| dc_only_idct_add_v6.asm | 31 orr r0, r0, r0, lsl #16 ; a1 | a1
43 orr r5, r5, r4, lsl #8
44 orr r7, r7, r6, lsl #8
58 orr r5, r5, r4, lsl #8
59 orr r7, r7, r6, lsl #8
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm11_asm/ |
| h264bsd_interpolate_chroma_hor_ver.s | 164 ADD count, count, tmp2, LSL #16 ;// chromaPartHeight-1
165 ADD count, count, tmp2, LSL #24 ;// loop_y
166 ADD count, count, tmp1, LSL #20 ;// chromaPartWidth-1
168 PKHBT valY, valY, yFrac, LSL #16 ;// |yFrac|valY |
182 LDRB tmp5, [ptrA, width, LSL #1]
184 PKHBT tmp1, tmp1, tmp3, LSL #16 ;// |t3|t1|
185 PKHBT tmp3, tmp3, tmp5, LSL #16 ;// |t5|t3|
190 ADD count, count, tmp2, LSL #8
195 LDRB tmp6, [ptrA, width, LSL #1]
197 PKHBT tmp2, tmp2, tmp4, LSL #16 ;// |t4|t2
[all...] |
| h264bsd_interpolate_chroma_hor.s | 158 ADD count, count, tmp2, LSL #16 ;// chromaPartHeight-1
159 ADD count, count, tmp2, LSL #24 ;// loop_y
160 ADD count, count, tmp1, LSL #20 ;// chromaPartWidth-1
162 PKHBT valX, valX, xFrac, LSL #16 ;// |xFrac|valX |
163 MOV valX, valX, LSL #3 ;// multiply by 8 in advance
175 ADD count, count, tmp2, LSL #8
183 PKHBT tmp5, tmp1, tmp3, LSL #16
184 PKHBT tmp6, tmp2, tmp4, LSL #16
192 PKHBT tmp7, tmp3, tmp1, LSL #16
193 PKHBT tmp8, tmp4, tmp2, LSL #1
[all...] |
| h264bsd_interpolate_ver_quarter.s | 137 ADD count, partW, partH, LSL #8 ;// |xx|xx|partH|partW|
139 RSB count, tmp5, count, LSL #8 ;// |xx|partH-1|partW-1|xx|
148 ADD count, count, tmp1, LSL #16 ;// partWidth-1 to top byte
162 ADD tmpa, tmpa, tmpa, LSL #2 ;// 5(G+M)
165 ADD tmpa, plus16, tmpa, LSL #2 ;// 16+20(G+M)
169 ADD tmpb, tmpb, tmpb, LSL #2 ;// 5(C+R)
178 ADD tmpa, tmpa, tmpa, LSL #2 ;// 5(G+M)
180 ADD tmpa, plus16, tmpa, LSL #2 ;// 16+20(G+M)
185 ADD tmpb, tmpb, tmpb, LSL #2 ;// 5(C+R)
189 MOVS tmp1, count, LSL #31 ;// update flags (verOffset
[all...] |
| /external/tremolo/Tremolo/ |
| mdctARM.s | 58 MOV r3, r3, LSL #1
117 MOV r3, r3, LSL #1
193 MOV r8, r8, LSL #1
232 MOV r8, r8, LSL #1
300 MOV r2,r2,LSL #1
304 MOV r2,r2,LSL r3 @ r2 = step = 2<<shift
312 ADD r4, r1, r0, LSL #1 @ r4 = aX = in+(n>>1)
323 LDR r10,[r5],r2,LSL #2 @ r10= T[0] T += step
333 MOV r9, r9, LSL #1
338 MOV r12,r12,LSL #
[all...] |
| /external/valgrind/main/none/tests/arm/ |
| v6intThumb.c | 84 "orr " #RD "," #RD "," #RD ", LSL #8" "\n\t" \
85 "orr " #RD "," #RD "," #RD ", LSL #16" "\n\t" \
437 printf("LSL\n");
438 TESTINST3("lsl r0, r1, r2", 0xffffffff, 0, r0, r1, r2, 0);
439 TESTINST3("lsl r0, r1, r2", 0xffffffff, 1, r0, r1, r2, 0);
440 TESTINST3("lsl r0, r1, r2", 0xffffffff, 2, r0, r1, r2, 0);
441 TESTINST3("lsl r0, r1, r2", 0xffffffff, 31, r0, r1, r2, 0);
442 TESTINST3("lsl r0, r1, r2", 0xffffffff, 32, r0, r1, r2, 0);
443 TESTINST3("lsl r0, r1, r2", 0xffffffff, 33, r0, r1, r2, 0);
444 TESTINST3("lsl r0, r1, r2", 0xffffffff, 63, r0, r1, r2, 0)
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| omxVCM4P10_DequantTransformResidualFromPairAndAdd_s.s | 97 ORR rowLuma01,rowLuma01,temp3,LSL #16 ;// rowLuma01 = [0b|0a]
106 ;// So we can shift the packed rowLuma values [0b|0a] with a single LSL operation
110 LSL rowLuma01,rowLuma01,shift
111 LSL rowLuma23,rowLuma23,shift
139 PKHBT SrcDst00,SrcDst00,temp1,LSL #16 ;// Pack the first two product values
146 PKHBT SrcDst02,SrcDst02,temp2,LSL #16 ;// Pack the next two product values
150 PKHBT SrcDst10,SrcDst10,temp1,LSL #16 ;// Pack the next two product values
158 PKHBT SrcDst12,SrcDst12,temp2,LSL #16 ;// Pack the next two product values
162 PKHBT SrcDst20,SrcDst20,temp1,LSL #16 ;// Pack the next two product values
174 PKHBT SrcDst22,SrcDst22,temp2,LSL #16 ;// Pack the remaining product value
[all...] |
| armVCM4P10_Interpolate_Chroma_s.s | 135 ADD dxEightMinusdx, EightMinusdx, dx, LSL #16
136 ORR iWidth, iWidth, temp, LSL #16
167 ORR x01x00, x00, x01, LSL #16
169 ORR x02x01, x01, x02, LSL #16
171 ORR x11x10, x10, x11, LSL #16
172 ORR x12x11, x11, x12, LSL #16
187 RSB pSrc2, pSrc, pSrc1, LSL #1
194 ORR OutRow0100, OutRow00, OutRow01, LSL #8
204 ORR x21x20, x20, x21, LSL #16
205 ORR x22x21, x21, x22, LSL #16
[all...] |
| armVCM4P10_InterpolateLuma_HalfVer4x4_unsafe_s.s | 121 SUB pSrc, pSrc, srcStep, LSL #2
131 RSB ValCD0, ValEB0, ValCD0, LSL #2 ;// 4*(Off+C+D) - (Off+B+E)
133 LDR ValD, [pSrc, srcStep, LSL #1] ;// Load [d3 d2 d1 d0]
135 RSB ValCD1, ValEB1, ValCD1, LSL #2
140 LDR ValF, [pSrc, srcStep, LSL #2] ;// Load [f3 f2 f1 f0]
142 ADD ValCD0, ValCD0, ValCD0, LSL #2 ;// 5 * [4*(Off+C+D) - (Off+B+E)]
143 ADD ValCD1, ValCD1, ValCD1, LSL #2
146 RSB ValED1, ValCF1, ValED1, LSL #2
148 SUB ValA, pSrc, srcStep, LSL #1
150 RSB ValED0, ValCF0, ValED0, LSL #2 ;// 4*(Off+E+D) - (Off+C+F)
[all...] |
| /external/chromium_org/third_party/libvpx/source/libvpx/build/make/ |
| thumb.pm | 19 # Write additions with shifts, such as "add r10, r11, lsl #8",
20 # in three operand form, "add r10, r10, r11, lsl #8".
21 s/(add\s+)(r\d+),\s*(r\d+),\s*(lsl #\d+)/$1$2, $2, $3, $4/g;
28 # This converts instructions such as "add r12, r12, r5, lsl r4"
29 # into the sequence "lsl r5, r4", "add r12, r12, r5", "lsr r5, r4".
30 s/^(\s*)(add)(\s+)(r\d+),\s*(r\d+),\s*(r\d+),\s*lsl (r\d+)/$1lsl$3$6, $7\n$1$2$3$4, $5, $6\n$1lsr$3$6, $7/g;
44 # This converts "ldrne r4, [src, -pstep, lsl #1]" into
45 # "subne src, src, pstep, lsl #1", "ldrne r4, [src]",
46 # "addne src, src, pstep, lsl #1". In a couple of cases wher
[all...] |
| /external/libvpx/libvpx/build/make/ |
| thumb.pm | 19 # Write additions with shifts, such as "add r10, r11, lsl #8",
20 # in three operand form, "add r10, r10, r11, lsl #8".
21 s/(add\s+)(r\d+),\s*(r\d+),\s*(lsl #\d+)/$1$2, $2, $3, $4/g;
28 # This converts instructions such as "add r12, r12, r5, lsl r4"
29 # into the sequence "lsl r5, r4", "add r12, r12, r5", "lsr r5, r4".
30 s/^(\s*)(add)(\s+)(r\d+),\s*(r\d+),\s*(r\d+),\s*lsl (r\d+)/$1lsl$3$6, $7\n$1$2$3$4, $5, $6\n$1lsr$3$6, $7/g;
44 # This converts "ldrne r4, [src, -pstep, lsl #1]" into
45 # "subne src, src, pstep, lsl #1", "ldrne r4, [src]",
46 # "addne src, src, pstep, lsl #1". In a couple of cases wher
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/build/make/ |
| thumb.pm | 19 # Write additions with shifts, such as "add r10, r11, lsl #8",
20 # in three operand form, "add r10, r10, r11, lsl #8".
21 s/(add\s+)(r\d+),\s*(r\d+),\s*(lsl #\d+)/$1$2, $2, $3, $4/g;
28 # This converts instructions such as "add r12, r12, r5, lsl r4"
29 # into the sequence "lsl r5, r4", "add r12, r12, r5", "lsr r5, r4".
30 s/^(\s*)(add)(\s+)(r\d+),\s*(r\d+),\s*(r\d+),\s*lsl (r\d+)/$1lsl$3$6, $7\n$1$2$3$4, $5, $6\n$1lsr$3$6, $7/g;
44 # This converts "ldrne r4, [src, -pstep, lsl #1]" into
45 # "subne src, src, pstep, lsl #1", "ldrne r4, [src]",
46 # "addne src, src, pstep, lsl #1". In a couple of cases wher
[all...] |
| /external/chromium_org/third_party/boringssl/linux-arm/crypto/aes/ |
| aes-armv4.S | 180 orr r0,r0,r4,lsl#8
182 orr r0,r0,r5,lsl#16
184 orr r0,r0,r6,lsl#24
187 orr r1,r1,r4,lsl#8
189 orr r1,r1,r5,lsl#16
191 orr r1,r1,r6,lsl#24
194 orr r2,r2,r4,lsl#8
196 orr r2,r2,r5,lsl#16
198 orr r2,r2,r6,lsl#24
201 orr r3,r3,r4,lsl#
[all...] |
| /external/chromium_org/third_party/boringssl/src/crypto/aes/asm/ |
| aes-armv4.pl | 200 orr $s0,$s0,$t1,lsl#8
202 orr $s0,$s0,$t2,lsl#16
204 orr $s0,$s0,$t3,lsl#24
207 orr $s1,$s1,$t1,lsl#8
209 orr $s1,$s1,$t2,lsl#16
211 orr $s1,$s1,$t3,lsl#24
214 orr $s2,$s2,$t1,lsl#8
216 orr $s2,$s2,$t2,lsl#16
218 orr $s2,$s2,$t3,lsl#24
221 orr $s3,$s3,$t1,lsl#
[all...] |
| /external/openssl/crypto/aes/asm/ |
| aes-armv4.S | 178 orr r0,r0,r4,lsl#8
180 orr r0,r0,r5,lsl#16
182 orr r0,r0,r6,lsl#24
185 orr r1,r1,r4,lsl#8
187 orr r1,r1,r5,lsl#16
189 orr r1,r1,r6,lsl#24
192 orr r2,r2,r4,lsl#8
194 orr r2,r2,r5,lsl#16
196 orr r2,r2,r6,lsl#24
199 orr r3,r3,r4,lsl#
[all...] |
| aes-armv4.pl | 198 orr $s0,$s0,$t1,lsl#8
200 orr $s0,$s0,$t2,lsl#16
202 orr $s0,$s0,$t3,lsl#24
205 orr $s1,$s1,$t1,lsl#8
207 orr $s1,$s1,$t2,lsl#16
209 orr $s1,$s1,$t3,lsl#24
212 orr $s2,$s2,$t1,lsl#8
214 orr $s2,$s2,$t2,lsl#16
216 orr $s2,$s2,$t3,lsl#24
219 orr $s3,$s3,$t1,lsl#
[all...] |
| /bionic/libc/arch-arm/generic/bionic/ |
| memcpy.S | 82 movs r12, r3, lsl #31
111 movs r12, r3, lsl #28
179 movs r12, r2, lsl #28
184 movs r12, r2, lsl #30
220 mov r12, r5, lsl #3 /* r12 = right */
230 movs r5, r5, lsl #31
246 orr r4, r3, r5, lsl lr
274 orr r3, r3, r4, lsl #16
276 orr r4, r4, r5, lsl #16
278 orr r5, r5, r6, lsl #1
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| cor_h_vec_opt.s | 41 ADD r7, r4, r2, LSL #5 @r7 --- p0 = rrixix[track]
49 ADD r9, r1, r2, LSL #1 @p2 = &vec[pos]
63 MOV r6, r6, LSL #2 @L_sum2 = (L_sum2 << 2)
66 MOV r5, r5, LSL #2 @L_sum1 = (L_sum1 << 2)
71 ADD r9, r3, r2, LSL #1 @address of sign[pos]
83 ADD r9, r9, r4, LSL #1
84 ADD r12, r12, r4, LSL #1
94 ADD r9, r1, r2, LSL #1 @p2 = &vec[pos]
109 MOV r6, r6, LSL #2 @L_sum2 = (L_sum2 << 2)
112 MOV r5, r5, LSL #2 @L_sum1 = (L_sum1 << 2
[all...] |
