| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/ |
| bilinearfilter_v6.asm | 41 mov r3, r3, lsl #1 ; height*2
59 pkhbt r6, r6, r7, lsl #16 ; src[1] | src[0]
60 pkhbt r7, r7, r8, lsl #16 ; src[2] | src[1]
63 pkhbt r8, r8, r9, lsl #16 ; src[3] | src[2]
65 pkhbt r9, r9, r10, lsl #16 ; src[4] | src[3]
99 add r9, r2, r4, lsl #1 ; adding back block width
|
| /hardware/samsung_slsi/exynos5/libswconverter/ |
| csc_tiled_to_linear_uv_deinterleave_neon.s | 79 mov r11, r11, lsl #4
128 add r8, r8, r6, lsl #3
150 sub r8, r8, r14, lsl #1
174 add r8, r8, r6, lsl #3
205 add r8, r8, r6, lsl #3
231 sub r8, r8, r14, lsl #1
|
| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
| omxSP_FFTInv_CCSToR_S32S16_Sfs_s.S | 106 ADD pDst,pOut,N, LSL #2
111 ADD pDst,pOut,N, LSL #2
|
| /external/compiler-rt/lib/builtins/arm/ |
| switch32.S | 36 add r0, lr, r0, lsl #2 // compute address of element in table
37 add ip, lr, ip, lsl #2 // compute address of last element in table
|
| /external/libhevc/common/arm64/ |
| ihevc_inter_pred_chroma_copy_w16out.s | 116 lsl x12,x12,#1 //2*wd
130 lsl x6, x3,#1
166 sub x1,x10,x11,lsl #1
205 lsl x5, x3,#1
207 sub x20,x12,x3, lsl #2 // x11 = (dst_strd * 4) - width
209 sub x20,x12,x2,lsl #2 //x2->src_strd
244 add x20,x1,x11,lsl #1
291 add x20,x1,x11,lsl #1
|
| ihevc_intra_pred_filters_chroma_mode_19_to_25.s | 118 add x7, x7, x5, lsl #2 //gai4_ihevc_ang_table[mode]
119 add x8, x8, x5, lsl #2 //gai4_ihevc_inv_ang_table
128 add x6, sp, x4 , lsl #1 //ref_temp + 2 * nt
134 add x1, x0, x4, lsl #2 //x1 = &src[4nt]
182 add x6, sp, x4 ,lsl #1 //ref_temp + 2 * nt
190 add x1, x0, x4, lsl #2 //x1 = &src[2nt]
198 lsl x0, x0, #1
218 lsl x7,x4,#2 //four_nt
220 add x8,x6,x5,lsl #2 //*gai4_ihevc_ang_table[mode]
228 add x8, sp, x4, lsl #1 //ref_temp + 2 * n
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| adc.ll | 42 ; CHECK-LE: adds x0, x0, x2, lsl #45
44 ; CHECK-BE: adds x1, x1, x3, lsl #45
|
| arm64-fast-isel-addr-offset.ll | 40 ; CHECK: movz x[[REG:[0-9]+]], #0xb3a, lsl #32
41 ; CHECK: movk x[[REG]], #0x73ce, lsl #16
|
| arm64-fcopysign.ll | 8 ; CHECK: movi.4s v2, #0x80, lsl #24
40 ; CHECK: movi.4s v[[CONST:[0-9]+]], #0x80, lsl #24
|
| neon-mov.ll | 98 ; CHECK: mvni {{v[0-9]+}}.2s, #{{0x10|16}}, lsl #8
104 ; CHECK: mvni {{v[0-9]+}}.2s, #{{0x10|16}}, lsl #16
110 ; CHECK: mvni {{v[0-9]+}}.2s, #{{0x10|16}}, lsl #24
122 ; CHECK: mvni {{v[0-9]+}}.4s, #{{0x10|16}}, lsl #8
128 ; CHECK: mvni {{v[0-9]+}}.4s, #{{0x10|16}}, lsl #16
135 ; CHECK: mvni {{v[0-9]+}}.4s, #{{0x10|16}}, lsl #24
148 ; CHECK: mvni {{v[0-9]+}}.4h, #{{0x10|16}}, lsl #8
160 ; CHECK: mvni {{v[0-9]+}}.8h, #{{0x10|16}}, lsl #8
|
| neon-bitwise-instructions.ll | 106 ; CHECK: orr {{v[0-9]+}}.2s, #{{0xff|255}}, lsl #8
113 ; CHECK: orr {{v[0-9]+}}.2s, #{{0xff|255}}, lsl #16
120 ; CHECK: orr {{v[0-9]+}}.2s, #{{0xff|255}}, lsl #24
134 ; CHECK: orr {{v[0-9]+}}.4s, #{{0xff|255}}, lsl #8
141 ; CHECK: orr {{v[0-9]+}}.4s, #{{0xff|255}}, lsl #16
148 ; CHECK: orr {{v[0-9]+}}.4s, #{{0xff|255}}, lsl #24
162 ; CHECK: orr {{v[0-9]+}}.4h, #{{0xff|255}}, lsl #8
176 ; CHECK: orr {{v[0-9]+}}.8h, #{{0xff|255}}, lsl #8
190 ; CHECK: bic {{v[0-9]+}}.2s, #{{0x10|16}}, lsl #8
197 ; CHECK: bic {{v[0-9]+}}.2s, #{{0x10|16}}, lsl #1
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| arm-negative-stride.ll | 8 ; CHECK: str r1, [{{r.*}}, {{r.*}}, lsl #2]
30 ; CHECK: str r1, [{{r.*}}, -{{r.*}}, lsl #2]
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| thumb-tests.txt | 60 # CHECK-NOT: pkhbt r2, r4, r6, lsl #0
73 # CHECK-NOT: rsb r0, r2, r0, lsl #0
77 # CHECK-NOT: ssat r0, #17, r12, lsl #0
173 # CHECK: tbh [r5, r4, lsl #1]
179 # CHECK: ldr.w r4, [sp, r4, lsl #3]
197 # CHECK: lsl.w r7, r3, r5
212 # CHECK: pld [r5, r0, lsl #1]
299 # CHECK: pldw [r11, r12, lsl #2]
|
| /external/tremolo/Tremolo/ |
| dpen.s | 100 ADC r2, r6, r7, LSL #1 @ r8 = &t[chase*2+C]
146 ORR r0, r14,r10,LSL #8 @ r7 = chase = (next<<8) | r14
157 ADC r2, r6, r7, LSL #1 @ r8 = &t[chase*2+C]
183 MOV r8, r8, LSL #1 @ r8 = (chase+bit)<<1
197 MOV r7, r7, LSL #1
206 ORR r0, r14,r10,LSL #16 @ r7 = chase = (next<<16) | r14
216 LDR r7, [r6, r2, LSL #2]
266 MOVLT r14,r14,LSL r11 @ r14= add = s->q_min << -add (if add < 0)
271 MOVLT r12,r12,LSL r5 @ r12=mul<<-shiftM
273 MOVGT r14,r14,LSL r5 @ add <<= shift
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| Dot_p_opt.s | 62 MOV r12, r4, LSL #1
70 MOV r0, r12, LSL r10 @ L_sum = L_sum << sft
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| armVCM4P10_TransformResidual4x4_s.s | 186 PKHBT trRow00,in00,in10,LSL #16 ;// [1 0] = [f4:f0]
196 PKHBT trRow20,in02,in12,LSL #16 ;// [9 8] = [6 2]
204 PKHBT trRow02,in20,in30,LSL #16 ;// [3 2] = [f12:f8]
217 PKHBT trRow22,in22,in32,LSL #16 ;// [11 10] = [14 10]
266 PKHBT trCol00,rowOp00,rowOp10,LSL #16 ;// [1 0] = [f4:f0]
276 PKHBT trCol20,rowOp02,rowOp12,LSL #16 ;// [9 8] = [6 2]
284 PKHBT trCol02,rowOp20,rowOp30,LSL #16 ;// [3 2] = [f12:f8]
297 PKHBT trCol22,rowOp22,rowOp32,LSL #16 ;// [11 10] = [14 10]
|
| /frameworks/native/opengl/libagl/ |
| iterators.S | 84 adc r6, r6, r7, lsl #28
85 rsb r6, r6, r2, lsl #16
|
| matrix.h | 70 "adc %0, %0, %1, lsl #16 \n"
122 "add %0, %0, %1, lsl #16 \n"
153 "add %0, %0, %1, lsl #16 \n"
208 "add %0, %7, %0, lsl %6 \n"
248 "add %0, %7, %0, lsl %6 \n"
289 "add %0, %7, %0, lsl %6 \n"
329 "adc %0, %0, %1, lsl #16 \n"
362 "adc %0, %0, %1, lsl #16 \n"
|
| /external/libvpx/libvpx/vp8/common/arm/neon/ |
| mbloopfilter_neon.asm | 33 sub r0, r0, r1, lsl #1 ; move src pointer down by 4 lines
48 sub r12, r12, r1, lsl #2
76 sub r0, r0, r1, lsl #2 ; move u pointer down by 4 lines
79 sub r12, r12, r1, lsl #2 ; move v pointer down by 4 lines
100 sub r0, r0, r1, lsl #3
101 sub r12, r12, r1, lsl #3
136 add r12, r0, r1, lsl #3 ; move src pointer down by 8 lines
171 sub r0, r0, r1, lsl #3
175 sub r12, r12, r1, lsl #3
266 sub r0, r0, r1, lsl #
[all...] |
| /frameworks/av/media/libstagefright/codecs/m4v_h263/enc/src/ |
| fastquant_inline.h | 45 q_value = coeff * q_scale; //q_value = -((-(coeff + QPdiv2)*q_scale)>>LSL);
46 q_value >>= shift; //q_value = (((coeff - QPdiv2)*q_scale)>>LSL );
193 smulbb q_value, q_scale, coeff /*mov coeff, coeff, lsl #14*/
249 movs coeff, q_value, lsl #1
288 mul q_value, q_scale, coeff /*mov coeff, coeff, lsl #14*/
346 movs coeff, q_value, lsl #1
372 subs coeff, coeff, ac_clip, lsl #1
414 movs q_value, q_value, lsl #1
474 "subs %1, %1, %2, lsl #1\n\t"
576 asm volatile("movs %1, %2, lsl #1\n\t
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/neon/ |
| mbloopfilter_neon.asm | 33 sub r0, r0, r1, lsl #1 ; move src pointer down by 4 lines
48 sub r12, r12, r1, lsl #2
76 sub r0, r0, r1, lsl #2 ; move u pointer down by 4 lines
79 sub r12, r12, r1, lsl #2 ; move v pointer down by 4 lines
100 sub r0, r0, r1, lsl #3
101 sub r12, r12, r1, lsl #3
136 add r12, r0, r1, lsl #3 ; move src pointer down by 8 lines
171 sub r0, r0, r1, lsl #3
175 sub r12, r12, r1, lsl #3
266 sub r0, r0, r1, lsl #
[all...] |
| /external/llvm/test/MC/Disassembler/AArch64/ |
| arm64-memory.txt | 28 # CHECK: ldrsw x0, [x1, x0, lsl #2]
396 # CHECK: ldr w0, [x0, x0, lsl #2]
398 # CHECK: ldr x0, [x0, x0, lsl #3]
413 # CHECK: ldr b1, [x1, x2, lsl #0]
415 # CHECK: ldr h1, [x1, x2, lsl #1]
417 # CHECK: ldr s1, [x1, x2, lsl #2]
419 # CHECK: ldr d1, [x1, x2, lsl #3]
421 # CHECK: ldr q1, [x1, x2, lsl #4]
520 # Load/Store with explicit LSL values
544 # CHECK: ldrsw x0, [x1, x0, lsl #2
[all...] |
| /external/chromium_org/third_party/boringssl/linux-arm/crypto/sha/ |
| sha512-armv4.S | 68 add r2,r1,r2,lsl#7 @ len to point at the end of inp
117 orr r3,r3,r9,lsl#8
119 orr r3,r3,r10,lsl#16
121 orr r3,r3,r11,lsl#24
122 orr r4,r4,r12,lsl#8
123 orr r4,r4,r9,lsl#16
124 orr r4,r4,r10,lsl#24
140 eor r9,r9,r8,lsl#18
142 eor r10,r10,r7,lsl#18
146 eor r9,r9,r8,lsl#1
[all...] |
| /external/openssl/crypto/sha/asm/ |
| sha512-armv4.S | 66 add r2,r1,r2,lsl#7 @ len to point at the end of inp
115 orr r3,r3,r9,lsl#8
117 orr r3,r3,r10,lsl#16
119 orr r3,r3,r11,lsl#24
120 orr r4,r4,r12,lsl#8
121 orr r4,r4,r9,lsl#16
122 orr r4,r4,r10,lsl#24
138 eor r9,r9,r8,lsl#18
140 eor r10,r10,r7,lsl#18
144 eor r9,r9,r8,lsl#1
[all...] |
| /art/runtime/arch/arm/ |
| memcmp16_arm.S | 193 orr ip, ip, lr, lsl #16
198 orreq ip, ip, lr, lsl #16
203 orreq ip, ip, lr, lsl #16
208 orreq ip, ip, lr, lsl #16
|
