| /external/llvm/test/CodeGen/AArch64/ |
| arm64-2011-10-18-LdStOptBug.ll | 17 ; CHECK: x[[REG]], #1, lsl #12
|
| arm64-const-addr.ll | 8 ; CHECK: movz w8, #0x40f, lsl #16
|
| arm64-vector-imm.ll | 60 ; CHECK: movi.4s v0, #0x4b, lsl #8
67 ; CHECK: movi.4s v0, #0x4b, lsl #16
74 ; CHECK: movi.4s v0, #0x4b, lsl #24
89 ; CHECK: movi.8h v0, #0x4b, lsl #8
|
| /external/llvm/test/CodeGen/ARM/ |
| bits.ll | 30 ; CHECK: lsl
|
| inlineasm-imm-arm.ll | 29 %y = call i32 asm "lsl $0, $1, $2", "=r,r,M"( i32 %x, i32 31 ) nounwind
|
| /external/llvm/test/CodeGen/Thumb2/ |
| 2013-03-02-vduplane-nonconstant-source-index.ll | 5 ; CHECK: add.w r[[ADDR:[0-9]+]], r[[SOURCE]], {{r[0-9]+}}, lsl #2
|
| thumb2-pack.ll | 4 ; CHECK: pkhbt r0, r0, r1, lsl #16
13 ; CHECK: pkhbt r0, r0, r1, lsl #16
22 ; CHECK: pkhbt r0, r0, r1, lsl #12
32 ; CHECK: pkhbt r0, r0, r1, lsl #18
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| thumb2-rsb.ll | 9 ; CHECK: rsb r0, r0, r1, lsl #5
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| /frameworks/av/media/libstagefright/codecs/amrwb/src/ |
| pvamrwbdecoder_basic_op_armv5.h | 69 mov L_var_out, var1, lsl #16
70 mov L_var_aux, var2, lsl #16
86 mov L_var_out, var1, lsl #16
87 mov L_var_aux, var2, lsl #16
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/comm/src/ |
| omxVCCOMM_ExpandFrame_I_s.s | 157 ADD y,iFrameHeight,iExpandPels,LSL #1
160 RSB RowStep,iExpandPels,iPlaneStep,LSL #1
166 M_LDRB tempLeft1,[pSrcDstPlane],iPlaneStep,LSL #1 ;// PreLoad the values
167 M_LDRB tempRight1,[pRightIndex],iPlaneStep,LSL #1
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.S | 63 SUB r0,r0,r1,LSL #3
114 SUB r0,r0,r1,LSL #3
153 SUB r0,r0,r1,LSL #3
163 ADD r0,r0,r1,LSL #3
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/ |
| vp8_variance16x16_armv6.asm | 29 pld [r0, r1, lsl #0]
30 pld [r2, r3, lsl #0]
44 pld [r0, r1, lsl #1]
47 pld [r2, r3, lsl #1]
|
| vp8_variance_halfpixvar16x16_h_armv6.asm | 29 pld [r0, r1, lsl #0]
30 pld [r2, r3, lsl #0]
49 pld [r0, r1, lsl #1]
52 pld [r2, r3, lsl #1]
|
| vp8_variance_halfpixvar16x16_v_armv6.asm | 29 pld [r0, r1, lsl #0]
30 pld [r2, r3, lsl #0]
50 pld [r0, r1, lsl #1]
53 pld [r2, r3, lsl #1]
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/armv6/ |
| vp8_mse16x16_armv6.asm | 31 pld [r0, r1, lsl #0]
32 pld [r2, r3, lsl #0]
45 pld [r0, r1, lsl #1]
48 pld [r2, r3, lsl #1]
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vpx_scale/arm/neon/ |
| vp8_vpxyv12_copysrcframe_func_neon.asm | 41 mov r6, r6, lsl #1
42 mov r7, r7, lsl #1
152 mov r6, r6, lsl #1
153 mov r7, r7, lsl #1
|
| /hardware/samsung_slsi/exynos5/libswconverter/ |
| csc_tiled_to_linear_uv_neon.s | 76 mov r11, r11, lsl #4
111 add r8, r8, r6, lsl #3
152 add r8, r8, r6, lsl #3
179 add r8, r8, r6, lsl #3
|
| csc_tiled_to_linear_y_neon.s | 77 mov r11, r11, lsl #4
126 add r8, r8, r6, lsl #4
167 add r8, r8, r6, lsl #4
194 add r8, r8, r6, lsl #4
|
| /bionic/libc/arch-arm/bionic/ |
| memcmp.S | 260 orr ip, ip, lr, lsl #16
265 orreq ip, ip, lr, lsl #16
270 orreq ip, ip, lr, lsl #16
275 orreq ip, ip, lr, lsl #16
303 mov r5, r0, lsl #3 /* r5 = right shift */
314 orr ip, ip, r7, lsl r6
319 orreq ip, ip, r7, lsl r6
|
| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
| armSP_FFT_CToC_SC32_Radix4_unsafe_s.S | 140 LSL grpCount,subFFTSize,#2
147 MOV pointStep,subFFTNum,LSL #1
156 LSL pointStep,pointStep,#2 @// 2*grpSize
159 MOV srcStep,pointStep,LSL #1 @// srcStep = 2*pointStep
165 MOV dstStep,outPointStep,LSL #1
178 MOV twStep,stepTwiddle,LSL #2
368 SUB pDst,pSrc,outPointStep,LSL #2 @// pDst -= 2*size; pSrc -= 8*size bytes
|
| /external/libhevc/common/arm/ |
| ihevc_weighted_pred_bi.s | 166 lsl r5,r5,r14 @((off0 + off1 + 1) << (shift - 1))
172 lsl r9,r7,#1
174 lsl r3,r3,#1
176 lsl r4,r4,#1
252 rsb r11,r9,r3,lsl #2 @2*src_strd1 - wd
254 rsb r12,r9,r4,lsl #2 @2*src_strd2 - wd
258 rsb r10,r7,r5,lsl #2 @2*dst_strd - wd
|
| /external/libhevc/common/arm64/ |
| ihevc_inter_pred_luma_copy_w16out.s | 101 lsl x6, x3,#1
135 sub x1,x10,x11,lsl #1
148 lsl x5, x3,#1
150 sub x20,x12,x3, lsl #2 // x11 = (dst_strd * 4) - width
152 sub x20,x12,x2,lsl #2 //x2->src_strd
184 add x20,x1,x11,lsl #1
231 add x20,x1,x11,lsl #1
|
| ihevc_weighted_pred_bi.s | 197 lsl x5,x5,x14 //((off0 + off1 + 1) << (shift - 1))
203 lsl x9,x7,#1
205 lsl x3,x3,#1
207 lsl x4,x4,#1
290 sub x20,x9,x3,lsl #2 //2*src_strd1 - wd
293 sub x20,x9,x4,lsl #2 //2*src_strd2 - wd
298 sub x20,x7,x5,lsl #2 //2*dst_strd - wd
|
| /bionic/libc/arch-arm64/denver64/bionic/ |
| memset.S | 73 orr A_lw, A_lw, A_lw, lsl #8
74 orr A_lw, A_lw, A_lw, lsl #16
75 orr A_l, A_l, A_l, lsl #32
216 lsl zva_len, tmp3w, zva_len
223 lsl zva_len, tmp3w, zva_len
|
| /bionic/libc/arch-arm64/generic/bionic/ |
| memset.S | 79 orr A_lw, A_lw, A_lw, lsl #8
80 orr A_lw, A_lw, A_lw, lsl #16
81 orr A_l, A_l, A_l, lsl #32
189 lsl zva_len, tmp3w, zva_len
196 lsl zva_len, tmp3w, zva_len
|
