/external/chromium_org/third_party/webrtc/common_audio/signal_processing/ |
complex_fft.c | 108 __asm __volatile("pkhbt %0, %1, %2, lsl #16" : "=r"(wri) : 120 " lsl #16\n\t" 254 __asm __volatile("pkhbt %0, %1, %2, lsl #16" : "=r"(wri) : 265 "pkhbt %[frfi_r], %[frfi_even], %[frfi_odd], lsl #16\n\t"
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filter_ar_fast_q12_armv7.S | 50 add r12, r2, r3, lsl #1 52 sub r9, r1, r3, lsl #1 112 add r12, r2, r3, lsl #1 114 sub r9, r1, r3, lsl #1
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vector_scaling_operations_neon.S | 65 lsl r9, r6
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/external/compiler-rt/lib/builtins/arm/ |
switch8.S | 39 add ip, lr, r0, lsl #1 // compute label = lr + element*2
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switchu8.S | 39 add ip, lr, r0, lsl #1 // compute label = lr + element*2
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/external/libhevc/common/arm/ |
ihevc_intra_pred_filters_luma_mode_11_to_17.s | 143 add r7, r7, r5, lsl #2 @gai4_ihevc_ang_table[mode] 144 add r8, r8, r5, lsl #2 @gai4_ihevc_inv_ang_table[mode - 11] 157 add r1, r0, r4, lsl #1 @r1 = &src[2nt] 239 add r1, r0, r4, lsl #1 @r1 = &src[2nt] 278 add r12, r12, r7, lsl #4 282 sub r7, r7, r3, lsl #3 @r7 = 8-8r3 508 add r5,r2,r3,lsl#2 558 add r2,r3, lsl #2 609 add r12, r12, r7, lsl #4
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/external/libhevc/common/arm64/ |
ihevc_inter_pred_luma_vert_w16inp_w16out.s | 126 lsl x6,x3,#1 129 lsl x2, x2,#1 130 sub x12,x2,x2,lsl #2 //src_ctrd & pi1_coeff 145 movi v30.4s,#8, lsl #16 147 sub x9,x5,x6,lsl #2 //r6->dst_strd r5 ->wd 149 sub x8,x5,x2,lsl #2 //r2->src_strd 157 //mov r2, r2, lsl #1 183 add x20,x0,x8,lsl #0 246 add x20,x0,x8,lsl #0
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ihevc_intra_pred_chroma_mode_27_to_33.s | 107 lsl x7,x4,#2 //four_nt 109 add x8,x6,x5,lsl #2 //*gai4_ihevc_ang_table[mode] 121 lsl x4,x4,#1 149 lsl x14,x14,#1 199 lsl x14,x14,#1 278 lsl x14,x14,#1 342 lsl x14,x14,#1 409 lsl x20, x3,#3 424 lsl x14,x14,#1
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/external/libvpx/libvpx/vp8/common/arm/armv6/ |
copymem8x4_v6.asm | 27 pld [r0, r1, lsl #1]
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copymem8x8_v6.asm | 27 pld [r0, r1, lsl #1]
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/external/libvpx/libvpx/vp8/common/arm/neon/ |
idct_dequant_0_2x_neon.asm | 58 sub r2, r2, r3, lsl #2 ; dst - 4*stride
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/external/lldb/test/arm_emulation/new-test-files/ |
test-add-3-arm.dat | 2 assembly_string="add r0, r1, r0, lsl #2"
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test-add-4-arm.dat | 2 assembly_string="add r0, r2, r7, lsl r1"
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test-ldr-6-arm.dat | 2 assembly_string="ldr r2, [r6], +r8, lsl #2"
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test-sub-4-thumb.dat | 2 assembly_string="sub.w r1, sp, r3, lsl #2"
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/external/llvm/lib/Target/ARM/ |
ARMSelectionDAGInfo.h | 26 case ISD::SHL: return ARM_AM::lsl;
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/external/llvm/test/CodeGen/AArch64/ |
f16-convert.ll | 55 ; CHECK-NEXT: ldr [[HREG:h[0-9]+]], [x0, x1, lsl #1] 67 ; CHECK-NEXT: ldr [[HREG:h[0-9]+]], [x0, x1, lsl #1] 181 ; CHECK-NEXT: str h0, [x0, x1, lsl #1] 193 ; CHECK-NEXT: str h0, [x0, x1, lsl #1]
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/external/llvm/test/CodeGen/ARM/ |
ldr.ll | 53 ; CHECK: ldr r0{{.*}}lsl{{.*}}
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select_xform.ll | 95 ; ARM: andeq r2, r2, r2, lsl #1 99 ; T2: andeq.w r2, r2, r2, lsl #1 141 ; ARM: eorge r0, r1, r2, lsl #7 145 ; T2: eorge.w r0, r1, r2, lsl #7
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/external/llvm/test/CodeGen/Thumb2/ |
thumb2-add.ll | 76 ; CHECK: add{{.*}} lsl #8
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thumb2-eor.ll | 26 ; CHECK: eor.w r0, r0, r1, lsl #5
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thumb2-ldr.ll | 53 ; CHECK: ldr.w r0, [r0, r1, lsl #2]
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thumb2-ldrb.ll | 54 ; CHECK: ldrb.w r0, [r0, r1, lsl #2]
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thumb2-ldrh.ll | 53 ; CHECK: ldrh.w r0, [r0, r1, lsl #2]
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thumb2-orn.ll | 42 ; CHECK: orn r0, r0, r1, lsl #5
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