| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-str.ll | 58 ; CHECK: str.w r0, [r1, r2, lsl #2]
|
| thumb2-strb.ll | 58 ; CHECK: strb.w r0, [r1, r2, lsl #2]
|
| thumb2-strh.ll | 58 ; CHECK: strh.w r0, [r1, r2, lsl #2]
|
| thumb2-teq2.ll | 24 ; CHECK: teq.w {{.*}}, r1, lsl #5
|
| thumb2-tst2.ll | 24 ; CHECK: tst.w {{.*}}, r1, lsl #5
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| unpredictable-LSL-regform.txt | 9 # A8.6.89 LSL (register)
|
| /external/pixman/pixman/ |
| pixman-arm-neon-asm.h | 414 PF pld, [PF_SRC, PF_X, lsl #src_bpp_shift]
417 PF pld, [PF_DST, PF_X, lsl #dst_bpp_shift]
420 PF pld, [PF_MASK, PF_X, lsl #mask_bpp_shift]
425 PF ldrgeb DUMMY, [PF_SRC, SRC_STRIDE, lsl #src_bpp_shift]!
428 PF ldrgeb DUMMY, [PF_DST, DST_STRIDE, lsl #dst_bpp_shift]!
431 PF ldrgeb DUMMY, [PF_MASK, MASK_STRIDE, lsl #mask_bpp_shift]!
586 add DST_W, DST_W, DST_STRIDE, lsl #dst_bpp_shift
588 add SRC, SRC, SRC_STRIDE, lsl #src_bpp_shift
591 add MASK, MASK, MASK_STRIDE, lsl #mask_bpp_shift
594 sub DST_W, DST_W, W, lsl #dst_bpp_shif
[all...] |
| /external/skia/src/opts/ |
| memset32_neon.S | 93 add pc, pc, r2, lsl #2
|
| /external/valgrind/main/none/tests/arm/ |
| ldrt_arm.c | 24 "mov r5, %1 ; mov r6, #33; ldrt r7, [r5], +r6, lsl #2 ; ldrt r7, [r5], +r6, lsl #2 ; mov %0, r7"
131 "mov r4, %0 ; mov r5, #1 ; mov r6, #0xCD ; strbt r6, [r4], r5, LSL #1 ; strbt r6, [r4], r5"
167 "mov r4, %0 ; mov r5, #2 ; ldr r6, =0xFFFEDCBA ; strt r6, [r4], -r5, LSL #1 ; mov r5, #0 ; ldr r6, =0x76543210 ; strt r6, [r4], +r5"
|
| /frameworks/av/media/libstagefright/codecs/amrwb/src/ |
| pvamrwbdecoder_basic_op_gcc_armv5.h | 67 "mov %0, %2, lsl #16\n"
68 "mov %1, %3, lsl #16\n"
88 "mov %0, %2, lsl #16\n"
89 "mov %1, %3, lsl #16\n"
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| armVCM4P10_DeblockingLuma_unsafe_s.s | 198 EOR u1, u1, m01 ,LSL #7
252 ADD alpha, alpha, m01, LSL #1
306 EOR a, a, m01, LSL #7
354 EOR t10, t10, m01, LSL #7
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p2/src/ |
| omxVCM4P2_DecodePadMV_PVOP_s.s | 210 LSL scaleFactor,one,temp ;// scaleFactor=1<<(fcodeForward-1)
212 LSL scaleFactor,scaleFactor,#5
283 ADD temp,pDstMVCurMB,BlkCount,LSL #2 ;// temp=pDstMVCurMB[BlkCount]
301 LSL temp1,BlkCount,#2 ;// temp=BlkCount*4
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s | 278 SUB pSrcDst, pSrcDst, srcdstStep, LSL #3
372 SUB pSrcDst, pSrcDst, srcdstStep, LSL #3
425 SUB pSrcDst, pSrcDst, srcdstStep, LSL #3
437 ADD pSrcDst, pSrcDst, srcdstStep, LSL #3
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| armVCM4P10_InterpolateLuma_HalfVer4x4_unsafe_s.S | 33 ADD r12,r0,r1,LSL #2
|
| omxVCM4P10_TransformDequantLumaDCFromPair_s.S | 47 LSL r5,r5,r4
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/ |
| omxVCM4P2_DecodePadMV_PVOP_s.s | 210 LSL scaleFactor,one,temp ;// scaleFactor=1<<(fcodeForward-1)
212 LSL scaleFactor,scaleFactor,#5
283 ADD temp,pDstMVCurMB,BlkCount,LSL #2 ;// temp=pDstMVCurMB[BlkCount]
301 LSL temp1,BlkCount,#2 ;// temp=BlkCount*4
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm/ |
| h264bsdFlushBits.s | 65 CMP readBits, strmBuffSize, LSL #3
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm_gcc/ |
| h264bsdFlushBits.S | 63 CMP readBits, strmBuffSize, LSL #3
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/ |
| copymem8x4_v6.asm | 27 pld [r0, r1, lsl #1]
|
| copymem8x8_v6.asm | 27 pld [r0, r1, lsl #1]
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/neon/ |
| idct_dequant_0_2x_neon.asm | 58 sub r2, r2, r3, lsl #2 ; dst - 4*stride
|
| /external/llvm/test/MC/ARM/ |
| basic-thumb2-instructions.s | 49 adcs r0, r1, r3, lsl #7
59 @ CHECK: adcs.w r0, r1, r3, lsl #7 @ encoding: [0x51,0xeb,0xc3,0x10]
122 adds r7, r3, r1, lsl #31
130 @ CHECK: adds.w r7, r3, r1, lsl #31 @ encoding: [0x13,0xeb,0xc1,0x77]
173 ands r2, r1, r7, lsl #1
179 @ CHECK: ands.w r2, r1, r7, lsl #1 @ encoding: [0x11,0xea,0x47,0x02]
277 bic r11, r2, r6, lsl #12
286 bic r4, r2, lsl #31
296 @ CHECK: bic.w r11, r2, r6, lsl #12 @ encoding: [0x22,0xea,0x06,0x3b]
304 @ CHECK: bic.w r4, r4, r2, lsl #31 @ encoding: [0x24,0xea,0xc2,0x74
[all...] |
| /external/libhevc/common/arm/ |
| ihevc_itrans_recon_16x16.s | 151 mov r6,r6,lsl #1 @ x sizeof(word16)
152 add r9,r0,r6, lsl #1 @ 2 rows
154 add r10,r6,r6, lsl #1 @ 3 rows
155 add r5,r6,r6,lsl #2
175 add r5,r5,r6,lsl #3
185 add r5,r5,r6,lsl #3
196 add r5,r5,r6,lsl #3
692 add r4,r2,r8, lsl #1 @ r4 = r2 + pred_strd * 2 => r4 points to 3rd row of pred data
693 add r5,r8,r8, lsl #1 @
694 @ add r0,r3,r7, lsl #1 @ r0 points to 3rd row of dest dat
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ExpandPseudoInsts.cpp | 112 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt));
190 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt));
214 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt));
365 AArch64_AM::getShifterImm(AArch64_AM::LSL, FirstMovkIdx * 16));
381 AArch64_AM::getShifterImm(AArch64_AM::LSL, SecondMovkIdx * 16));
435 // MOVK x0, |B|, LSL #16
513 unsigned Shift = 0; // LSL amount for high bits with MOVZ/MOVN
514 unsigned LastShift = 0; // LSL amount for last MOVK
529 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, Shift));
555 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, Shift))
[all...] |
| /external/llvm/test/Transforms/LoopStrengthReduce/ARM/ |
| ivchain-ARM.ll | 10 ; A9: lsl
11 ; A9-NOT: lsl
14 ; A9-NOT: lsl
43 ; A9: lsl
44 ; A9: lsl
47 ; A9: lsl
48 ; A9: lsl
83 ; A9: lsl
84 ; A9-NOT: {{str r|lsl}}
87 ; A9-NOT: {{ldr .*[sp]|lsl}}
[all...] |
