| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/armv7/ |
| armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S | 113 MOV pointStep,grpSize,LSL #3
117 MOV step1,grpSize,LSL #4
118 MOV step2,pointStep,LSL #3
|
| omxSP_FFTFwd_RToCCS_F32_Sfs_s.S | 202 MOV step,subFFTSize,LSL #3
204 SUB twStep,step,subFFTSize,LSL #1
206 MOV step1,subFFTSize,LSL #2
|
| armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S | 89 MOV pointStep,grpSize,LSL #3
|
| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
| armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe_s.S | 148 MOV step,N,LSL #2 @// step = N/2 * 8 bytes
161 SUB twStep,step,size,LSL #1 @// twStep = 3N/8 * 8 bytes pointing to W^1
163 MOV step1,size,LSL #2 @// step1 = N/4 * 8 = N/2*4 bytes
|
| omxSP_FFTFwd_RToCCS_F32_Sfs_s.S | 272 MOV step,subFFTSize,LSL #3 @// step = N/2 * 8 bytes
275 SUB twStep,step,subFFTSize,LSL #1
278 MOV step1,subFFTSize,LSL #2 @// step1 = N/2 * 4 bytes
|
| armSP_FFT_CToC_SC16_Radix2_fs_unsafe_s.S | 106 MOV pointStep,grpSize,LSL #2
|
| armSP_FFT_CToC_SC16_Radix8_fs_unsafe_s.S | 216 MOV pointStep,grpSize,LSL #2
220 @//MOV step1,pointStep,LSL #1 @// step1 = 2*pointStep
222 MOV step1,grpSize,LSL #3
224 MOV step2,pointStep,LSL #3
|
| armSP_FFT_CToC_SC32_Radix2_fs_unsafe_s.S | 102 MOV pointStep,grpSize,LSL #3
|
| armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S | 209 MOV pointStep,grpSize,LSL #3
213 @//MOV step1,pointStep,LSL #1 @// step1 = 2*pointStep
215 MOV step1,grpSize,LSL #4
217 MOV step2,pointStep,LSL #3
|
| omxSP_FFTFwd_RToCCS_S32_Sfs_s.S | 391 SUB pSrc,pSrc,subFFTSize,LSL #3 @// reset pSrc for final fixup
415 MOV step,subFFTSize,LSL #3 @// step = N/2 * 8 bytes
417 SUB twStep,step,subFFTSize,LSL #1 @// twStep = 3N/8 * 8 bytes pointing to W^1
420 MOV step1,subFFTSize,LSL #2 @// step1 = N/2 * 4 bytes
|
| /external/libhevc/common/arm/ |
| ihevc_intra_pred_luma_vert.s | 107 lsl r5, r4, #1 @2nt
123 lsl r11, r3, #2
188 lsl r5, r3, #3 @8*stride
|
| ihevc_intra_pred_chroma_mode_18_34.s | 118 add r0,r0,r4,lsl #2
|
| ihevc_intra_pred_luma_dc.s | 124 add r7, r0, r4, lsl #1 @&src[2nt]
208 sub r12, r3, r3, lsl #3 @-7*strd
364 lsl r6, r3, #2
448 sub r12, r3, r3, lsl #2 @-3*strd
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-dagcombiner-load-slicing.ll | 9 ; CHECK: add [[BASE:x[0-9]+]], x0, x1, lsl #3
41 ; CHECK: add [[BASE:x[0-9]+]], x0, x1, lsl #3
73 ; CHECK: add [[BASE:x[0-9]+]], x0, x1, lsl #4
|
| arm64-scvt.ll | 140 ; CHECK: ldr h[[REGNUM:[0-9]+]], [x0, x1, lsl #1]
153 ; CHECK: ldr s[[REGNUM:[0-9]+]], [x0, x1, lsl #2]
167 ; CHECK: ldr x[[REGNUM:[0-9]+]], [x0, x1, lsl #3]
248 ; CHECK: ldr h[[REGNUM:[0-9]+]], [x0, x1, lsl #1]
261 ; CHECK: ldr s[[REGNUM:[0-9]+]], [x0, x1, lsl #2]
274 ; CHECK: ldr d[[REGNUM:[0-9]+]], [x0, x1, lsl #3]
479 ; CHECK: ldr h[[REGNUM:[0-9]+]], [x0, x1, lsl #1]
493 ; CHECK: ldr s[[REGNUM:[0-9]+]], [x0, x1, lsl #2]
507 ; CHECK: ldr x[[REGNUM:[0-9]+]], [x0, x1, lsl #3]
590 ; CHECK: ldr h[[REGNUM:[0-9]+]], [x0, x1, lsl #1
[all...] |
| bitfield.ll | 80 ; CHECK: lsl {{w[0-9]+}}, {{w[0-9]+}}, #1
92 ; CHECK: lsl {{x[0-9]+}}, {{x[0-9]+}}, #63
108 ; CHECK: lsl {{w[0-9]+}}, {{w[0-9]+}}, #31
|
| movw-consts.ll | 68 ; CHECK: movn x0, #{{60875|0xedcb}}, lsl #16
|
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_neon_YuvToRGB.S | 233 add r0, r5, LSL #2
261 add r0, r4, LSL #2
287 add r0, r4, LSL #2
|
| /external/valgrind/main/none/tests/arm64/ |
| integer.c | 315 TESTINST2("add x3, x4, #0x876, lsl #0", ALL5s, x3, x4, 0);
316 TESTINST2("add x3, x4, #0x876, lsl #0", ALLfs, x3, x4, 0);
317 TESTINST2("add x3, x4, #0x876, lsl #12", ALL5s, x3, x4, 0);
318 TESTINST2("add x3, x4, #0x876, lsl #12", ALLfs, x3, x4, 0);
319 TESTINST2("add w3, w4, #0x876, lsl #0", ALL5s, x3, x4, 0);
320 TESTINST2("add w3, w4, #0x876, lsl #0", ALLfs, x3, x4, 0);
321 TESTINST2("add w3, w4, #0x876, lsl #12", ALL5s, x3, x4, 0);
322 TESTINST2("add w3, w4, #0x876, lsl #12", ALLfs, x3, x4, 0);
323 TESTINST2("adds x3, x4, #0x876, lsl #0", ALL5s, x3, x4, 0);
324 TESTINST2("adds x3, x4, #0x876, lsl #0", ALLfs, x3, x4, 0)
[all...] |
| /external/chromium_org/third_party/boringssl/src/crypto/sha/asm/ |
| sha1-armv4-large.pl | 104 orr $t0,$t0,$t1,lsl#8
106 orr $t0,$t0,$t2,lsl#16
108 orr $t0,$t0,$t3,lsl#24
165 add $len,$inp,$len,lsl#6 @ $len to point at the end of $inp
|
| /external/chromium_org/third_party/libvpx/source/libvpx/vp9/common/arm/neon/ |
| vp9_avg_neon.asm | 35 pld [r0, r1, lsl #1]
|
| /external/chromium_org/v8/src/arm64/ |
| builtins-arm64.cc | 447 Operand(prealloc_fields, LSL, kPointerSizeLog2));
451 __ Add(obj_end, new_obj, Operand(obj_size, LSL, kPointerSizeLog2));
465 __ Add(first_prop, new_obj, Operand(obj_size, LSL, kPointerSizeLog2));
598 __ Add(x3, x2, Operand(argc, LSL, kPointerSizeLog2));
726 __ Add(x10, argv, Operand(argc, LSL, kPointerSizeLog2));
[all...] |
| /external/libvpx/libvpx/vp9/common/arm/neon/ |
| vp9_avg_neon.asm | 35 pld [r0, r1, lsl #1]
|
| /external/linux-tools-perf/perf-3.12.0/arch/metag/lib/ |
| memset.S | 14 LSL D0Re0,D0Ar2,#16 ! Duplicate byte value into 16-31
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-bic.ll | 37 ; CHECK: bic.w r0, r0, r1, lsl #5
|
