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  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
radeon_setup_tgsi_llvm.c 52 ctx->branch + (ctx->branch_depth - 1) : NULL;
496 ctx->branch[ctx->branch_depth - 1].endif_block = endif_block;
497 ctx->branch[ctx->branch_depth - 1].if_block = if_block;
498 ctx->branch[ctx->branch_depth - 1].else_block = else_block;
499 ctx->branch[ctx->branch_depth - 1].has_else = 0;
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  /external/chromium_org/v8/src/arm64/
macro-assembler-arm64.h 91 // 'never' is used to not generate a branch (generally as the inverse
92 // branch type of 'always).
296 // Branch type inversion relies on these relations.
719 // Compare a register with an operand, and branch to label depending on the
726 // Test the bits of register defined by bit_pattern, and branch if ANY of
732 // Test the bits of register defined by bit_pattern, and branch if ALL of
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assembler-arm64.cc 392 // Emit the constant pool. It is preceded by an optional branch if
410 // Emit branch if required
630 void Assembler::RemoveBranchFromLabelLinkChain(Instruction* branch,
642 while (link != branch && !end_of_chain) {
649 DCHECK(branch == link);
650 next_link = branch->ImmPCOffsetTarget();
652 if (branch == prev_link) {
653 // The branch is the first instruction in the chain.
654 if (branch == next_link) {
655 // It is also the last instruction in the chain, so it is the only branch
    [all...]
lithium-codegen-arm64.h 152 // branch on the next emitted basic block where we could just fall-through.
157 const BranchGenerator& branch);
450 // emits code to branch when the condition holds and EmitInverted() emits
451 // the branch when the inverted condition is verified.
lithium-codegen-arm64.cc 45 // Emit code to branch if the given condition holds.
71 // Emit code to compare lhs and rhs and branch if the condition holds.
102 // Test the input with the given mask and branch if the condition holds.
153 // Test the input and branch if it is non-zero and not a NaN.
180 // Test the input and branch if it is a heap number.
199 // Test the input and branch if it is the specified root value.
851 // branch.
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  /external/chromium_org/v8/src/mips/
macro-assembler-mips.h 51 // Don't load NaNs or infinities, branch to the non number case instead.
55 // Allow programmer to use Branch Delay Slot of Branches, Jumps, Calls.
158 DECLARE_BRANCH_PROTOTYPES(Branch)
193 void Branch(Label* L,
263 // We NEED a nop in the branch delay slot, as it used by v8, for example in
265 // Currently the branch delay slot is filled by the MacroAssembler.
268 Branch(L);
324 Label* branch) {
325 InNewSpace(object, scratch, ne, branch);
332 Label* branch) {
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  /external/chromium_org/v8/src/mips64/
macro-assembler-mips64.h 51 // Don't load NaNs or infinities, branch to the non number case instead.
55 // Allow programmer to use Branch Delay Slot of Branches, Jumps, Calls.
179 DECLARE_BRANCH_PROTOTYPES(Branch)
214 void Branch(Label* L,
284 // We NEED a nop in the branch delay slot, as it used by v8, for example in
286 // Currently the branch delay slot is filled by the MacroAssembler.
289 Branch(L);
345 Label* branch) {
346 InNewSpace(object, scratch, ne, branch);
353 Label* branch) {
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  /external/mesa3d/src/gallium/drivers/radeon/
radeon_setup_tgsi_llvm.c 52 ctx->branch + (ctx->branch_depth - 1) : NULL;
496 ctx->branch[ctx->branch_depth - 1].endif_block = endif_block;
497 ctx->branch[ctx->branch_depth - 1].if_block = if_block;
498 ctx->branch[ctx->branch_depth - 1].else_block = else_block;
499 ctx->branch[ctx->branch_depth - 1].has_else = 0;
    [all...]
  /art/compiler/dex/quick/arm/
int_arm.cc 316 // Do special compare/branch against simple const operand if not already in registers.
364 * Generate a register comparison to an immediate and branch. Caller
365 * is responsible for setting branch target field.
368 LIR* branch = nullptr; local
372 * compare-and-branch if zero is ideal if it will reach. However, because null checks
373 * branch forward to a slow path, they will frequently not reach - and thus have to
375 * pass). Here we estimate the branch distance for checks, and if large directly
383 branch = NewLIR2((arm_cond == kArmCondEq) ? kThumb2Cbz : kThumb2Cbnz,
388 branch = NewLIR2(kThumb2Cbz, reg.GetReg(), 0);
392 if (branch == nullptr)
    [all...]
utility_arm.cc 217 LIR* branch = NewLIR2(kThumb2BCond, 0 /* offset to be patched */, local
219 branch->target = target;
220 return branch;
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  /external/chromium_org/third_party/libvpx/source/libvpx/vp9/common/arm/neon/
vp9_loopfilter_neon.asm 522 ; the power branch for all vectors.
570 ; the filter branch for all vectors.
580 ; At this point we have already executed the filter branch. The filter
581 ; branch does not set op2 or oq2, so use p2 and q2. Execute the power
582 ; branch and combine the data.
  /external/libvpx/libvpx/vp9/common/arm/neon/
vp9_loopfilter_neon.asm 522 ; the power branch for all vectors.
570 ; the filter branch for all vectors.
580 ; At this point we have already executed the filter branch. The filter
581 ; branch does not set op2 or oq2, so use p2 and q2. Execute the power
582 ; branch and combine the data.
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/arm/neon/
vp9_loopfilter_neon.asm 522 ; the power branch for all vectors.
570 ; the filter branch for all vectors.
580 ; At this point we have already executed the filter branch. The filter
581 ; branch does not set op2 or oq2, so use p2 and q2. Execute the power
582 ; branch and combine the data.
  /external/chromium_org/v8/src/compiler/
register-allocator.cc 1089 Instruction* branch = InstructionAt(cur_block->last_instruction_index()); local
1185 Instruction* branch = InstructionAt(pred->last_instruction_index()); local
    [all...]
instruction-selector.cc 395 // Branch targets should not have phis.
860 void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch,
863 Node* user = branch;
864 Node* value = branch->InputAt(0);
868 // If we can fall through to the true block, invert the branch.
874 // Try to combine with comparisons against 0 by simply inverting the branch.
899 // Try to combine the branch with a comparison.
939 // We cannot combine the <Operation>WithOverflow with this branch
943 // *AFTER* this branch).
965 // Branch could not be combined with a compare, emit compare against 0
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  /art/compiler/dex/quick/arm64/
utility_arm64.cc 544 LIR* branch = NewLIR2(kA64B2ct, ArmConditionEncoding(cc), local
546 branch->target = target;
547 return branch;
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  /external/chromium_org/third_party/WebKit/Tools/Scripts/
VCSUtils.pm 250 my $branch = gitBranch();
251 chomp(my $override = `git config --bool branch.$branch.webKitBranchBuild`);
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  /external/chromium_org/third_party/webrtc/common_audio/signal_processing/
downsample_fast_neon.S 53 bge POST_LOOP_ENDPOS @ branch when Iteration < 8 times.
67 beq LOOP_ENDPOS_FACTOR2 @ Branch when factor == 2
73 beq LOOP_ENDPOS_FACTOR4 @ Branch when factor == 4
  /external/libunwind/doc/
libunwind-ia64.tex 141 \item[\Const{UNW\_IA64\_BR}:] The base-index for branch registers.
142 Add an index in the range from 0..7 to get a particular branch
  /external/oprofile/events/i386/nehalem/
unit_masks 211 0x01 cond Counts the number of conditional near branch instructions executed, but not necessarily retired
212 0x02 direct Counts all unconditional near branch instructions excluding calls and indirect branches
213 0x04 indirect_non_call Counts the number of executed indirect near branch instructions that are not calls
214 0x07 non_calls Counts all non call near branch instructions executed, but not necessarily retired
216 0x10 direct_near_call Counts unconditional near call branch instructions, excluding non call branch, executed
222 0x01 cond Counts the number of mispredicted conditional near branch instructions executed, but not necessarily retired
223 0x02 direct Counts mispredicted macro unconditional near branch instructions, excluding calls and indirect branches (should always be 0)
224 0x04 indirect_non_call Counts the number of executed mispredicted indirect near branch instructions that are not calls
231 0x7F any Counts the number of mispredicted near branch instructions that were executed, but not necessarily retire
    [all...]
  /art/compiler/utils/arm/
assembler_thumb2.h 42 for (auto& branch : branches_) {
43 delete branch;
224 // Branch instructions.
422 bool force_32bit_branches_; // Force the assembler to use 32 bit branch instructions.
456 // depends on both the type of branch and the offset to which it is branching. When
457 // generating code for branches we don't know the size before hand (if the branch is
460 // we can determine the actual size of the branch. However, if we had guessed wrong before
462 // instruction (assume that we never decrease the size of a branch).
464 // To handle this, we keep a record of every branch in the program. The actual instruction
465 // encoding for these is delayed until we know the final size of every branch. When w
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  /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/
omxSP_FFTFwd_RToCCS_S16_Sfs_s.S 407 @ change branch "End" to branch "finalComplexToRealFixup" in the above
  /external/llvm/test/MC/PowerPC/
ppc64-operands.s 125 # Immediate branch operands
  /external/oprofile/events/i386/atom/
events 10 event:0xc4 counters:0,1 um:br_inst_retired minimum:500 name:BR_INST_RETIRED : number of branch instructions retired
78 event:0xE0 counters:0,1 um:zero minimum:6000 name:BR_INST_DECODED : Branch instructions decoded
  /external/tremolo/Tremolo/
bitwiseARM.s 75 BEQ look_next_segment @ r10= r12 = 0, if we branch
267 BEQ read_next_segment @ r10= r12 = 0, if we branch

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