| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_peephole.cpp | 764 CondCode cc, ccZ;
770 ccZ = (CondCode)((unsigned int)i->asCmp()->setCond & ~CC_U);
[all...] |
| nv50_ir_lowering_nv50.cpp | 359 CondCode cc = mul->cc;
639 const CondCode cc[4] = { CC_EQU, CC_S, CC_C, CC_O };
|
| nv50_ir_emit_nv50.cpp | 62 void emitCondCode(CondCode cc, DataType ty, int pos);
197 void CodeEmitterNV50::emitCondCode(CondCode cc, DataType ty, int pos)
[all...] |
| nv50_ir_from_tgsi.cpp | 192 nv50_ir::CondCode getSetCond() const;
415 nv50_ir::CondCode Instruction::getSetCond() const
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ISelLowering.cpp | 397 ISD::CondCode CCOpcode = cast<CondCodeSDNode>(CC)->get();
|
| SIISelLowering.cpp | 420 ISD::CondCode CCOp = dyn_cast<CondCodeSDNode>(CC)->get();
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_lowering_nv50.cpp | 359 CondCode cc = mul->cc;
639 const CondCode cc[4] = { CC_EQU, CC_S, CC_C, CC_O };
|
| nv50_ir_emit_nv50.cpp | 62 void emitCondCode(CondCode cc, DataType ty, int pos);
197 void CodeEmitterNV50::emitCondCode(CondCode cc, DataType ty, int pos)
[all...] |
| nv50_ir_from_tgsi.cpp | 192 nv50_ir::CondCode getSetCond() const;
415 nv50_ir::CondCode Instruction::getSetCond() const
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeDAG.cpp | [all...] |
| LegalizeIntegerTypes.cpp | [all...] |
| DAGCombiner.cpp | 293 SDValue N3, ISD::CondCode CC,
295 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
[all...] |
| SelectionDAGBuilder.cpp | [all...] |
| SelectionDAGISel.cpp | [all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/codegen/ |
| nv50_ir_emit_nvc0.cpp | 58 void emitCondCode(CondCode cc, int pos);
190 void CodeEmitterNVC0::emitCondCode(CondCode cc, int pos)
939 CondCode cc = i->setCond;
[all...] |
| /external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
| nv50_ir_emit_nvc0.cpp | 58 void emitCondCode(CondCode cc, int pos);
190 void CodeEmitterNVC0::emitCondCode(CondCode cc, int pos)
939 CondCode cc = i->setCond;
[all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | 640 static void InitCmpLibcallCCs(ISD::CondCode *CCs) {
641 memset(CCs, ISD::SETCC_INVALID, sizeof(ISD::CondCode)*RTLIB::UNKNOWN_LIBCALL);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsAsmPrinter.cpp | 666 O << Mips::MipsFCCToString((Mips::CondCode)MO.getImm());
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/R600/ |
| SIISelLowering.cpp | [all...] |
| AMDGPUISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
