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  /external/llvm/test/MC/Mips/mips3/
invalid-mips5-wrong-error.s 0 # Instructions that are invalid and are correctly rejected but use the wrong
invalid-mips5.s 0 # Instructions that are invalid
  /external/llvm/test/MC/Mips/mips32/
invalid-mips32r2.s 0 # Instructions that are invalid
  /external/llvm/test/MC/Mips/mips4/
invalid-mips5-wrong-error.s 0 # Instructions that are invalid and are correctly rejected but use the wrong
invalid-mips64r2.s 0 # Instructions that are invalid
  /external/llvm/test/MC/Mips/mips64r6/
invalid-mips3.s 0 # Instructions that are invalid
invalid-mips5-wrong-error.s 0 # Instructions that are invalid but currently emit the wrong error message.
  /external/mesa3d/src/gallium/drivers/r300/compiler/
radeon_variable.c 359 for (inst = c->Program.Instructions.Next;
360 inst != &c->Program.Instructions;
radeon_optimize.c 88 /* These instructions cannot read from the constants file.
307 * respective swizzles. Simplify instructions like ADD dst, src, 0;
387 /* Simplify instructions based on constants */
817 /* Rewrite the instructions */
859 struct rc_instruction * inst = c->Program.Instructions.Next;
861 while(inst != &c->Program.Instructions) {
880 inst = c->Program.Instructions.Next;
881 while(inst != &c->Program.Instructions) {
  /external/oprofile/events/mips/r12000/
events 5 event:0x1 counters:0,1,2,3 um:zero minimum:500 name:DECODED_INSTRUCTIONS : Decoded instructions
19 event:0xf counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTIONS_GRADUATED : Instructions graduated
20 event:0x10 counters:0,1,2,3 um:zero minimum:500 name:PREFETCH_INSTRUCTIONS_EXECUTED : Executed prefetch instructions
21 event:0x11 counters:0,1,2,3 um:zero minimum:500 name:PREFETCH_MISSES_IN_DCACHE : Primary data cache misses by prefetch instructions
25 event:0x15 counters:0,1,2,3 um:zero minimum:500 name:GRADUATED_FP_INSTRUCTIONS : Graduated floating point instructions
  /external/oprofile/events/mips/rm9000/
events 5 event:0x01 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS_ISSUED : Instructions issued
6 event:0x02 counters:0,1 um:zero minimum:500 name:FP_INSTRUCTIONS_ISSUED : Floating-point instructions issued
7 event:0x03 counters:0,1 um:zero minimum:500 name:INT_INSTRUCTIONS_ISSUED : Integer instructions issued
8 event:0x04 counters:0,1 um:zero minimum:500 name:LOAD_INSTRUCTIONS_ISSUED : Load instructions issued
9 event:0x05 counters:0,1 um:zero minimum:500 name:STORE_INSTRUCTIONS_ISSUED : Store instructions issued
21 event:0x12 counters:0,1 um:zero minimum:500 name:BRANCHES_ISSUED : Branch instructions issued
31 event:0x1c counters:0,1 um:zero minimum:500 name:CACHE_INSN_STALL_CYCLES : Stall cycles due to cache instructions
  /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/
tgsi_exec.h 271 const struct tgsi_token *Tokens; /**< Declarations, instructions */
328 struct tgsi_full_instruction *Instructions;
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/
radeon_optimize.c 88 /* These instructions cannot read from the constants file.
307 * respective swizzles. Simplify instructions like ADD dst, src, 0;
387 /* Simplify instructions based on constants */
817 /* Rewrite the instructions */
859 struct rc_instruction * inst = c->Program.Instructions.Next;
861 while(inst != &c->Program.Instructions) {
880 inst = c->Program.Instructions.Next;
881 while(inst != &c->Program.Instructions) {
r300_fragprog_emit.c 158 error("Too many ALU instructions");
331 error("Node %i has no TEX instructions", emit->current_node);
395 * Begin a block of texture instructions.
431 error("Too many TEX instructions");
475 * machine-readable instructions.
489 for(struct rc_instruction * inst = compiler->Base.Program.Instructions.Next;
490 inst != &compiler->Base.Program.Instructions && !compiler->Base.Error;
radeon_compiler_util.c 220 * operates on normal instructions.
438 * XXX For now we will limit instructions to only one presubtract
540 for (inst = c->Program.Instructions.Next;
541 inst != &c->Program.Instructions;
573 * This function attempts to remove a source from a pair instructions.
739 * channel in the swizzle. This is only useful for scalar instructions that are
radeon_program_print.c 474 for(inst = prog->Instructions.Next; inst != &prog->Instructions; inst = inst->Next) {
  /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/
brw_vs_constval.c 223 struct prog_instruction *inst = &vp->program.Base.Instructions[insn];
  /external/mesa3d/src/gallium/auxiliary/tgsi/
tgsi_exec.h 271 const struct tgsi_token *Tokens; /**< Declarations, instructions */
328 struct tgsi_full_instruction *Instructions;
  /external/mesa3d/src/mesa/drivers/dri/i965/
brw_vs_constval.c 223 struct prog_instruction *inst = &vp->program.Base.Instructions[insn];
  /external/oprofile/events/i386/westmere/
unit_masks 28 0x01 cond Conditional branch instructions executed
37 0x7f any Branch instructions executed
39 0x01 conditional Retired conditional branch instructions (Precise Event)
40 0x02 near_call Retired near call instructions (Precise Event)
41 0x04 all_branches Retired branch instructions (Precise Event)
56 0x04 all_branches Mispredicted retired branch instructions (Precise Event)
91 0x01 to_fp Transitions from MMX to Floating Point instructions
92 0x02 to_mmx Transitions from Floating Point to MMX instructions
101 0x01 any_p Instructions retired (Programmable counter and Precise Event)
103 0x04 mmx Retired MMX instructions (Precise Event
    [all...]
  /external/chromium_org/third_party/mesa/src/src/mesa/program/
prog_execute.c 474 * Store 4 floats into a register. Observe the instructions saturate and
659 const struct prog_instruction *inst = program->Instructions + pc;
718 ASSERT(program->Instructions[inst->BranchTarget].Opcode
723 ASSERT(program->Instructions[inst->BranchTarget].Opcode
739 ASSERT(program->Instructions[inst->BranchTarget].Opcode
748 ASSERT(program->Instructions[inst->BranchTarget].Opcode
951 ASSERT(program->Instructions[inst->BranchTarget].Opcode
953 program->Instructions[inst->BranchTarget].Opcode
980 ASSERT(program->Instructions[inst->BranchTarget].Opcode
    [all...]
  /external/chromium_org/third_party/sfntly/cpp/src/sfntly/table/truetype/
glyph_table.cc 350 CALLER_ATTACH ReadableFontData* GlyphTable::SimpleGlyph::Instructions() {
611 CALLER_ATTACH ReadableFontData* GlyphTable::CompositeGlyph::Instructions() {
  /external/llvm/test/MC/Mips/
micromips-alu-instructions.s 4 # for arithmetic and logical instructions.
6 # Arithmetic and Logical Instructions
  /external/llvm/test/MC/Mips/mips1/
valid.s 0 # Instructions that are valid
  /external/llvm/test/MC/Mips/mips2/
invalid-mips3.s 0 # Instructions that are invalid

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