| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips32.s | 0 # Instructions that are invalid
|
| /external/llvm/test/MC/Mips/mips5/ |
| invalid-mips64r2.s | 0 # Instructions that are invalid
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips64.s | 0 # Instructions that are invalid
|
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 146 DeleteContainerSeconds(Instructions);
277 // Parse the instructions defined in the .td file.
279 Instructions[Insts[i]] = new CodeGenInstruction(Insts[i]);
295 /// \brief Return all of the instructions defined by the target, ordered by
323 // All of the instructions are now in random order based on the map iteration.
340 /// encodings, reverse the bit order of all instructions.
|
| /external/llvm/utils/vim/ |
| llvm.vim | 22 " Instructions.
|
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| r300_fragprog_emit.c | 158 error("Too many ALU instructions");
331 error("Node %i has no TEX instructions", emit->current_node);
395 * Begin a block of texture instructions.
431 error("Too many TEX instructions");
475 * machine-readable instructions.
489 for(struct rc_instruction * inst = compiler->Base.Program.Instructions.Next;
490 inst != &compiler->Base.Program.Instructions && !compiler->Base.Error;
|
| radeon_compiler_util.c | 220 * operates on normal instructions.
438 * XXX For now we will limit instructions to only one presubtract
540 for (inst = c->Program.Instructions.Next;
541 inst != &c->Program.Instructions;
573 * This function attempts to remove a source from a pair instructions.
739 * channel in the swizzle. This is only useful for scalar instructions that are
|
| radeon_program_print.c | 474 for(inst = prog->Instructions.Next; inst != &prog->Instructions; inst = inst->Next) {
|
| radeon_pair_schedule.c | 47 /** Next instruction in the linked list of ready instructions. */
73 * instruction to schedule. Instructions with a higher value of Score
80 /** For TEX instructions a list of readers */
86 * Used to keep track of which instructions read a value.
101 * Unordered linked list of instructions that read from this value.
142 * Linked lists of instructions that can be scheduled right now,
251 /* Adding Ready TEX instructions to the end of the "Ready List" helps
252 * us emit TEX instructions in blocks without losing our place. */
271 /* These functions provide different heuristics for scheduling instructions.
399 * See also the subtlety in how instructions that bot
[all...] |
| /external/mesa3d/src/mesa/program/ |
| prog_execute.c | 474 * Store 4 floats into a register. Observe the instructions saturate and
659 const struct prog_instruction *inst = program->Instructions + pc;
718 ASSERT(program->Instructions[inst->BranchTarget].Opcode
723 ASSERT(program->Instructions[inst->BranchTarget].Opcode
739 ASSERT(program->Instructions[inst->BranchTarget].Opcode
748 ASSERT(program->Instructions[inst->BranchTarget].Opcode
951 ASSERT(program->Instructions[inst->BranchTarget].Opcode
953 program->Instructions[inst->BranchTarget].Opcode
980 ASSERT(program->Instructions[inst->BranchTarget].Opcode
[all...] |
| prog_opt_constant_fold.c | 125 * Try to replace instructions that produce a constant result with simple moves
128 * unnecessary move instructions.
137 struct prog_instruction *const inst = &prog->Instructions[i];
165 /* FINISHME: We could also optimize CMP instructions where the first
|
| program_parse.y | 162 /* Tokens for instructions */
[all...] |
| /external/oprofile/events/mips/25K/ |
| events | 7 event:0x1 counters:0,1 um:zero minimum:500 name:INSN_ISSUED : Dispatched/issued instructions
8 event:0x2 counters:0,1 um:zero minimum:500 name:FP_INSNS_ISSUED : FPU instructions issued
9 event:0x3 counters:0,1 um:zero minimum:500 name:INT_INSNS_ISSUED : Integer instructions issued
10 event:0x4 counters:0,1 um:zero minimum:500 name:LOAD_INSNS_ISSUED : Load instructions issued
11 event:0x5 counters:0,1 um:zero minimum:500 name:STORE_INSNS_ISSUED : Store instructions issued
12 event:0x6 counters:0,1 um:zero minimum:500 name:BRANCHES_JUMPS_ISSUED : Branch/Jump instructions issued
20 event:0xa counters:0,1 um:zero minimum:500 name:INSN_FP_DATAPATH_COMPLETED : Instructions completed in FPU datapath (computational instructions only)
29 event:0xf counters:0,1 um:zero minimum:500 name:JR_RPD_MISSPREDICTED : JR instructions that mispredicted using the Return Prediction Stack
50 event:0x18 counters:0,1 um:zero minimum:500 name:INSNS_FETCHED_FROM_ICACHE : Total number of instructions fetched from the I-Cach
[all...] |
| /external/sfntly/cpp/src/sfntly/table/truetype/ |
| glyph_table.cc | 350 CALLER_ATTACH ReadableFontData* GlyphTable::SimpleGlyph::Instructions() {
611 CALLER_ATTACH ReadableFontData* GlyphTable::CompositeGlyph::Instructions() {
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/ |
| r300_tgsi_to_rc.c | 276 dst = rc_insert_new_instruction(ttr->compiler, ttr->compiler->Program.Instructions.Prev);
|
| /external/mesa3d/src/gallium/drivers/r300/ |
| r300_tgsi_to_rc.c | 276 dst = rc_insert_new_instruction(ttr->compiler, ttr->compiler->Program.Instructions.Prev);
|
| /external/valgrind/main/exp-bbv/tests/x86/ |
| rep_prefix.S | 2 # rep, repe (repz) and repne (repnz) prefixed string instructions
4 # This test makes sure the bbv plugin counts these instructions properly
33 # Load and Store Instructions
89 # Move instructions
114 # Compare equal instructions
154 # Compare not equal instructions
|
| /external/chromium_org/third_party/mesa/src/src/mesa/main/ |
| ffvertex_prog.c | 308 GLint max_inst; /** number of instructions allocated for program */
601 p->program->Base.Instructions,
604 _mesa_free_instructions(p->program->Base.Instructions,
607 p->program->Base.Instructions = newInst;
612 inst = &p->program->Base.Instructions[nr];
[all...] |
| /external/mesa3d/src/mesa/main/ |
| ffvertex_prog.c | 308 GLint max_inst; /** number of instructions allocated for program */
601 p->program->Base.Instructions,
604 _mesa_free_instructions(p->program->Base.Instructions,
607 p->program->Base.Instructions = newInst;
612 inst = &p->program->Base.Instructions[nr];
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
| radeon_pair_schedule.c | 47 /** Next instruction in the linked list of ready instructions. */
73 * instruction to schedule. Instructions with a higher value of Score
80 /** For TEX instructions a list of readers */
86 * Used to keep track of which instructions read a value.
101 * Unordered linked list of instructions that read from this value.
142 * Linked lists of instructions that can be scheduled right now,
251 /* Adding Ready TEX instructions to the end of the "Ready List" helps
252 * us emit TEX instructions in blocks without losing our place. */
271 /* These functions provide different heuristics for scheduling instructions.
399 * See also the subtlety in how instructions that bot
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i915/ |
| i915_fragprog.c | 312 struct prog_instruction *inst = &program->Base.Instructions[i];
355 GLuint nr = inst - program->Base.Instructions;
376 const struct prog_instruction *inst = program->Base.Instructions;
396 i915_program_error(p, "Exceeded max instructions (%d out of %d)",
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| i915_fragprog.c | 312 struct prog_instruction *inst = &program->Base.Instructions[i];
355 GLuint nr = inst - program->Base.Instructions;
376 const struct prog_instruction *inst = program->Base.Instructions;
396 i915_program_error(p, "Exceeded max instructions (%d out of %d)",
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/program/ |
| prog_opt_constant_fold.c | 125 * Try to replace instructions that produce a constant result with simple moves
128 * unnecessary move instructions.
137 struct prog_instruction *const inst = &prog->Instructions[i];
165 /* FINISHME: We could also optimize CMP instructions where the first
|
| program_parse.y | 162 /* Tokens for instructions */
[all...] |
| /external/llvm/test/MC/ARM/ |
| thumb-diagnostics.s | 16 @ Instructions which require v6+ for both registers to be low regs.
149 @ Out of range immediate for ADD SP instructions
|
