| /external/llvm/test/MC/Mips/mips3/ |
| invalid-mips5.s | 8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
10 ldxc1 $f8,$s7($t3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 lwxc1 $f12,$s1($s8) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 movf $gp,$8,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 movf $gp,$8,$fcc7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
15 movf.d $f6,$f11,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 movf.d $f6,$f11,$fcc5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
17 movf.s $f23,$f5,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| /external/lzma/C/ |
| BraIA64.c | 29 UInt64 instruction, instNorm;
local
35 instruction = 0;
37 instruction += (UInt64)data[i + j + bytePos] << (8 * j);
39 instNorm = instruction >> bitRes;
59 instruction &= (1 << bitRes) - 1;
60 instruction |= (instNorm << bitRes);
62 data[i + j + bytePos] = (Byte)(instruction >> (8 * j));
|
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/immutable/instruction/ |
| ImmutableArrayPayload.java | 32 package org.jf.dexlib2.immutable.instruction;
37 import org.jf.dexlib2.iface.instruction.formats.ArrayPayload;
67 public static ImmutableArrayPayload of(ArrayPayload instruction) {
68 if (instruction instanceof ImmutableArrayPayload) {
69 return (ImmutableArrayPayload)instruction;
72 instruction.getElementWidth(),
73 instruction.getArrayElements());
|
| ImmutablePackedSwitchPayload.java | 32 package org.jf.dexlib2.immutable.instruction;
37 import org.jf.dexlib2.iface.instruction.SwitchElement;
38 import org.jf.dexlib2.iface.instruction.formats.PackedSwitchPayload;
63 public static ImmutablePackedSwitchPayload of(PackedSwitchPayload instruction) {
64 if (instruction instanceof ImmutablePackedSwitchPayload) {
65 return (ImmutablePackedSwitchPayload)instruction;
68 instruction.getSwitchElements());
|
| ImmutableSparseSwitchPayload.java | 32 package org.jf.dexlib2.immutable.instruction;
37 import org.jf.dexlib2.iface.instruction.SwitchElement;
38 import org.jf.dexlib2.iface.instruction.formats.SparseSwitchPayload;
62 public static ImmutableSparseSwitchPayload of(SparseSwitchPayload instruction) {
63 if (instruction instanceof ImmutableSparseSwitchPayload) {
64 return (ImmutableSparseSwitchPayload)instruction;
67 instruction.getSwitchElements());
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips32.s | 8 madd $s6,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 madd $zero,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 maddu $s3,$gp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 maddu $24,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 movf $gp,$8,$fcc7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 movf.d $f6,$f11,$fcc5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 movf.s $f23,$f5,$fcc6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 movn $v1,$s1,$s0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 movn.d $f27,$f21,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 movn.s $f12,$f0,$s7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| invalid-mips2.s | 8 addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 mfhi $s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 mfhi $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 mthi $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 mtlo $25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 mtlo $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 mult $sp,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 mult $sp,$v0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| invalid-mips32r2.s | 8 madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 nmadd.d $f18,$f9,$f14,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 nmadd.s $f0,$f5,$f25,$f12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 nmsub.d $f30,$f8,$f16,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 nmsub.s $f1,$f24,$f19,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips1.s | 8 addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 bgezal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 c.ngl.d $f29,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 c.ngle.d $f0,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 c.sf.d $f30,$f0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 c.sf.s $f14,$f22 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 mfhi $s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 mfhi $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| /art/compiler/optimizing/ |
| builder.h | 30 class Instruction;
54 // Analyzes the dex instruction and adds HInstruction to the graph
55 // to execute that instruction. Returns whether the instruction can
57 bool AnalyzeDexInstruction(const Instruction& instruction, int32_t dex_offset);
71 void UpdateLocal(int register_index, HInstruction* instruction) const;
79 void Binop_23x(const Instruction& instruction, Primitive::Type type);
82 void Binop_12x(const Instruction& instruction, Primitive::Type type)
[all...] |
| pretty_printer.h | 29 void PrintPreInstruction(HInstruction* instruction) {
31 PrintInt(instruction->GetId());
35 virtual void VisitInstruction(HInstruction* instruction) {
36 PrintPreInstruction(instruction);
37 PrintString(instruction->DebugName());
38 PrintPostInstruction(instruction);
41 void PrintPostInstruction(HInstruction* instruction) {
42 if (instruction->InputCount() != 0) {
45 for (HInputIterator it(instruction); !it.Done(); it.Advance()) {
55 if (instruction->HasUses())
[all...] |
| /external/llvm/test/MC/ARM/ |
| invalid-crc32.s | 11 @ CHECK: error: instruction 'crc32cb' is not predicable, but condition code specified
12 @ CHECK: error: instruction 'crc32b' is not predicable, but condition code specified
13 @ CHECK: error: instruction 'crc32ch' is not predicable, but condition code specified
14 @ CHECK: error: instruction 'crc32h' is not predicable, but condition code specified
15 @ CHECK: error: instruction 'crc32cw' is not predicable, but condition code specified
16 @ CHECK: error: instruction 'crc32w' is not predicable, but condition code specified
|
| udf-thumb-2-diagnostics.s | 10 @ CHECK: error: instruction 'udf' is not predicable, but condition code specified
16 @ CHECK: error: instruction requires: arm-mode
22 @ CHECK: error: invalid operand for instruction
|
| diagnostics-noneon.s | 6 @ CHECK-ERRORS: error: instruction requires: NEON
7 @ CHECK-ERRORS: error: instruction requires: NEON
|
| ldrd-strd-gnu-arm-bad-imm.s | 3 @ CHECK: error: instruction requires: thumb2
7 @ CHECK: error: instruction requires: thumb2
|
| ldrd-strd-gnu-thumb-bad-regs.s | 4 @ CHECK: error: invalid operand for instruction
8 @ CHECK: error: invalid operand for instruction
|
| vmov-vmvn-illegal-cases.s | 4 @ CHECK: error: invalid operand for instruction
6 @ CHECK: error: invalid operand for instruction
8 @ CHECK: error: invalid operand for instruction
10 @ CHECK: error: invalid operand for instruction
13 @ CHECK: error: invalid operand for instruction
15 @ CHECK: error: invalid operand for instruction
17 @ CHECK: error: invalid operand for instruction
19 @ CHECK: error: invalid operand for instruction
|
| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips4-wrong-error.s | 9 ld $sp,-28645($s1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
10 lwu $s3,-24086($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
11 scd $15,-8243($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
12 sd $12,5835($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
13 sdl $a3,-20961($s8) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
14 sdr $11,-20423($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /external/llvm/test/MC/Mips/ |
| sym-expr.s | 11 jal __start + 0x4 # CHECK: instruction: [jal, Imm<__start+4>]
12 jal __start + (-0x10) # CHECK: instruction: [jal, Imm<__start-16>]
13 jal (__start + (-0x10)) # CHECK: instruction: [jal, Imm<__start-16>]
|
| mips-expansions-bad.s | 5 li $5, 0x100000000 # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled
6 dli $5, 1 # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips2.s | 8 ceil.w.d $f11,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 ceil.w.s $f6,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 floor.w.d $f14,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 floor.w.s $f8,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 round.w.d $f6,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 round.w.s $f27,$f28 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 sqrt.d $f17,$f22 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 sqrt.s $f0,$f1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 teqi $s5,-17504 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 tgei $s1,5025 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| /external/proguard/src/proguard/classfile/editor/ |
| InstructionAdder.java | 25 import proguard.classfile.instruction.visitor.InstructionVisitor;
26 import proguard.classfile.instruction.*;
58 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction)
60 // Add the instruction.
61 codeAttributeComposer.appendInstruction(offset, instruction);
67 // Create a copy of the instruction.
68 Instruction newConstantInstruction =
73 // Add the instruction.
|
| /external/proguard/src/proguard/classfile/instruction/visitor/ |
| InstructionConstantVisitor.java | 21 package proguard.classfile.instruction.visitor;
27 import proguard.classfile.instruction.*;
28 import proguard.classfile.instruction.visitor.InstructionVisitor;
57 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction) {}
|
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/iface/instruction/ |
| ReferenceInstruction.java | 32 package org.jf.dexlib2.iface.instruction;
38 public interface ReferenceInstruction extends Instruction {
|
| SwitchPayload.java | 32 package org.jf.dexlib2.iface.instruction;
|
