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/external/llvm/test/MC/Mips/
cpsetup.s	1 # RUN: llvm-mc -triple mips64-unknown-unknown -mattr=-n64,+o32 -filetype=obj -o - %s | \ 5 # RUN: llvm-mc -triple mips64-unknown-unknown -mattr=-n64,+o32 %s | \ 8 # RUN: llvm-mc -triple mips64-unknown-unknown -mattr=-n64,+n32 -filetype=obj -o - %s | \ 12 # RUN: llvm-mc -triple mips64-unknown-unknown -mattr=-n64,+n32 %s | \
micromips-loadstore-unaligned.s	2 # RUN: -mattr=micromips | FileCheck -check-prefix=CHECK-EL %s 4 # RUN: -mattr=micromips | FileCheck -check-prefix=CHECK-EB %s
micromips-movcond-instructions.s	1 # RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips \ 3 # RUN: llvm-mc %s -triple=mips -show-encoding -mattr=micromips \
micromips-multiply-instructions.s	1 # RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips \ 3 # RUN: llvm-mc %s -triple=mips -show-encoding -mattr=micromips \
oddspreg.s	1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64 | \ 4 # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64 -filetype=obj -o - | \ 8 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 -mattr=-n64,+n32 | \ 11 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 -mattr=-n64,+n32 -filetype=obj -o - | \
nooddspreg.s	1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64 | \ 4 # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64 -filetype=obj -o - | \ 8 # RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -mattr=-n64,n32 2> %t1
nabi-regs.s	10 # RUN: -mcpu=mips64r2 -arch=mips64 -mattr=-n64,+n32 | FileCheck %s 13 # RUN: -mcpu=mips64r2 -arch=mips64 -mattr=-n64,+n64 | FileCheck %s
nooddspreg-error.s	1 # RUN: not llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64 2> %t0 | \
micromips-jump-instructions.s	1 # RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips \ 3 # RUN: llvm-mc %s -triple=mips -show-encoding -mattr=micromips \
micromips-loadstore-instructions.s	1 # RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips \ 3 # RUN: llvm-mc %s -triple=mips -show-encoding -mattr=micromips \
micromips-shift-instructions.s	1 # RUN: llvm-mc %s -triple=mipsel -show-encoding -mcpu=mips32r2 -mattr=micromips | FileCheck -check-prefix=CHECK-EL %s 2 # RUN: llvm-mc %s -triple=mips -show-encoding -mcpu=mips32r2 -mattr=micromips | FileCheck -check-prefix=CHECK-EB %s
micromips-trap-instructions.s	1 # RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips \ 3 # RUN: llvm-mc %s -triple=mips -show-encoding -mattr=micromips \
micromips-control-instructions.s	1 # RUN: llvm-mc %s -triple=mipsel -show-encoding -mcpu=mips32r2 -mattr=micromips \ 3 # RUN: llvm-mc %s -triple=mips -show-encoding -mcpu=mips32r2 -mattr=micromips \
micromips-expressions.s	2 # RUN: -mcpu=mips32r2 -mattr=micromips | FileCheck %s
micromips-branch-instructions.s	1 # RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips \ 3 # RUN: llvm-mc %s -triple=mips -show-encoding -mattr=micromips \
micromips-branch16.s	2 # RUN: -mattr=micromips | FileCheck %s -check-prefix=CHECK-FIXUP 4 # RUN: -mattr=micromips | llvm-readobj -r \
/external/llvm/test/MC/Mips/msa/
abiflags.s	1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa | \ 4 # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
test_elm_insve.s	1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
test_i8.s	1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
test_vec.s	1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
/external/llvm/test/MC/ARM/
idiv.s	4 @ RUN: llvm-mc -triple=armv7 -mcpu=cortex-a15 -mattr=-hwdiv -show-encoding < %s 2>&1 | FileCheck -check-prefix A15-ARM-NOTHUMBHWDIV %s 5 @ RUN: llvm-mc -triple=thumbv7 -mcpu=cortex-a15 -mattr=-hwdiv-arm -show-encoding < %s 2>&1 | FileCheck -check-prefix A15-THUMB-NOARMHWDIV %s 10 @ RUN: llvm-mc -triple=armv8 -mattr=-hwdiv -show-encoding < %s 2>&1 | FileCheck -check-prefix ARMV8-NOTHUMBHWDIV %s 11 @ RUN: llvm-mc -triple=thumbv8 -mattr=-hwdiv-arm -show-encoding < %s 2>&1 | FileCheck -check-prefix THUMBV8-NOTHUMBHWDIV %s
invalid-idiv.s	1 @ RUN: not llvm-mc -triple=armv7 -mcpu=cortex-a15 -mattr=-hwdiv-arm < %s 2> %t 3 @ RUN: not llvm-mc -triple=thumbv7 -mcpu=cortex-a15 -mattr=-hwdiv < %s 2> %t
crc32-thumb.s	3 @ RUN: not llvm-mc -triple=thumbv8 -mattr=-crc -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-NOCRC
crc32.s	3 @ RUN: not llvm-mc -triple=thumbv8 -mattr=-crc -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-NOCRC
/external/llvm/test/Instrumentation/AddressSanitizer/X86/
asm_mov.s	1 # RUN: llvm-mc %s -triple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+sse2 -asm-instrumentation=address -asan-instrument-assembly | FileCheck %s

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