| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips4.s | 64 movt $zero,$s4,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
65 movt $zero,$s4,$fcc5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
66 movt.d $f0,$f2,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
67 movt.s $f30,$f2,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
68 movt.s $f30,$f2,$fcc1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| invalid-mips5.s | 63 movt $zero,$s4,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
64 movt $zero,$s4,$fcc5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
65 movt.d $f0,$f2,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
66 movt.s $f30,$f2,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
67 movt.s $f30,$f2,$fcc1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| invalid-mips5-wrong-error.s | 35 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
|
| /external/llvm/test/MC/Mips/ |
| micromips-fpu-instructions.s | 60 # CHECK-EL: movt.s $f4, $f6, $fcc0 # encoding: [0x86,0x54,0x60,0x00]
61 # CHECK-EL: movt.d $f4, $f6, $fcc0 # encoding: [0x86,0x54,0x60,0x02]
123 # CHECK-EB: movt.s $f4, $f6, $fcc0 # encoding: [0x54,0x86,0x00,0x60]
124 # CHECK-EB: movt.d $f4, $f6, $fcc0 # encoding: [0x54,0x86,0x02,0x60]
182 movt.s $f4, $f6, $fcc0
183 movt.d $f4, $f6, $fcc0
|
| mips-fpu-instructions.s | 164 # CHECK: movt $2, $1, $fcc0 # encoding: [0x01,0x10,0x21,0x00]
165 # CHECK: movt $4, $5, $fcc4 # encoding: [0x01,0x20,0xb1,0x00]
199 movt $2, $1, $fcc0
200 movt $4, $5, $fcc4
|
| /external/chromium_org/v8/test/cctest/ |
| test-disasm-mips.cc | 476 COMPARE(movt(a0, a1, 1),
477 "00a52001 movt a0, a1, 1");
478 COMPARE(movt(s0, s1, 2),
479 "02298001 movt s0, s1, 2");
480 COMPARE(movt(t2, t3, 3),
481 "016d5001 movt t2, t3, 3");
482 COMPARE(movt(v0, v1, 7),
483 "007d1001 movt v0, v1, 7");
|
| test-disasm-mips64.cc | 627 COMPARE(movt(a0, a1, 1),
628 "00a52001 movt a0, a1, 1");
629 COMPARE(movt(s0, s1, 2),
630 "02298001 movt s0, s1, 2");
631 COMPARE(movt(a6, a7, 3),
632 "016d5001 movt a6, a7, 3");
633 COMPARE(movt(v0, v1, 7),
634 "007d1001 movt v0, v1, 7");
|
| /external/llvm/test/MC/Mips/mips32/ |
| valid.s | 85 movt $zero,$s4,$fcc5
86 movt.d $f0,$f2,$fcc0
87 movt.s $f30,$f2,$fcc1
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 98 movt $zero,$s4,$fcc5
99 movt.d $f0,$f2,$fcc0
100 movt.s $f30,$f2,$fcc1
|
| /external/llvm/test/MC/Mips/mips4/ |
| valid.s | 132 movt $zero,$s4,$fcc5
133 movt.d $f0,$f2,$fcc0
134 movt.s $f30,$f2,$fcc1
|
| invalid-mips5-wrong-error.s | 35 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
|
| /external/llvm/test/MC/Mips/mips5/ |
| valid.s | 133 movt $zero,$s4,$fcc5
134 movt.d $f0,$f2,$fcc0
135 movt.s $f30,$f2,$fcc1
|
| /external/llvm/test/MC/Mips/mips64/ |
| valid.s | 143 movt $zero,$s4,$fcc5
144 movt.d $f0,$f2,$fcc0
145 movt.s $f30,$f2,$fcc1
|
| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips5-wrong-error.s | 35 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
|
| /external/llvm/test/MC/Mips/mips3/ |
| invalid-mips5-wrong-error.s | 35 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips5-wrong-error.s | 37 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
|
| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/armv7/ |
| armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S | 108 movt N, #0x3f00
|
| omxSP_FFTFwd_RToCCS_F32_Sfs_s.S | 129 movt N, #0x3f00
|
| armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S | 126 movt t0,#0x3f35
|
| /external/llvm/test/MC/ARM/ |
| thumb2-diagnostics.s | 77 movt r0, foo2
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 159 movt $zero,$s4,$fcc5
160 movt.d $f0,$f2,$fcc0
161 movt.s $f30,$f2,$fcc1
|
| /art/compiler/utils/arm/ |
| assembler_arm32.cc | 685 void Arm32Assembler::movt(Register rd, uint16_t imm16, Condition cond) { function in class:art::arm::Arm32Assembler
[all...] |
| /external/chromium_org/v8/src/arm/ |
| disasm-arm.cc | 434 // Print the movw or movt instruction.
518 // 'mw: movt/movw instructions.
911 Format(instr, "movt'cond 'mw");
[all...] |
| /external/chromium_org/v8/src/mips/ |
| disasm-mips.cc | 800 Format(instr, "movt 'rd, 'rs, 'bc");
[all...] |
| /external/chromium_org/v8/src/mips64/ |
| disasm-mips64.cc | 927 Format(instr, "movt 'rd, 'rs, 'bc");
[all...] |
