| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/armv7/ |
| armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S | 69 #define y1r s4
|
| /external/clang/test/Analysis/ |
| array-struct-region.c | 290 ShortString s4 = s3; local
292 clang_analyzer_eval(s4.data[0] == 'z'); // expected-warning{{TRUE}}
293 clang_analyzer_eval(s4.data[1] == 'b'); // expected-warning{{TRUE}}
294 clang_analyzer_eval(s4.data[2] == 'c'); // expected-warning{{TRUE}}
|
| /external/clang/test/CXX/class/class.union/ |
| p1.cpp | 86 struct s4 : CopyCtor { // expected-note {{because no constructor can be used to copy an object of type 'const U3::s4'}} struct in union:U3
|
| /external/clang/test/OpenMP/ |
| parallel_sections_copyin_messages.cpp | 25 class S4 { // expected-note {{'S4' declared here}}
27 S4();
28 S4 &operator=(const S4 &s4);
31 S4(int v) : a(v) {}
49 S4 l(3); // expected-note {{'l' defined here}}
|
| /external/clang/test/SemaCXX/ |
| cxx0x-initializer-aggregates.cpp | 25 S s4{ {1, 2}, {3, 4}, {5, 6}, { {7, 8} } };
|
| /external/libcxx/test/re/re.regex/re.regex.construct/ |
| il_flg.pass.cpp | 38 std::string s4("(a([bc]))");
|
| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips4.s | 19 daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
28 dsll $zero,$s4,$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
29 dsll $zero,$s4,18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
33 dsllv $zero,$s4,$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
40 dsrl $s3,$6,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
45 dsrlv $s3,$14,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
64 movt $zero,$s4,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
65 movt $zero,$s4,$fcc5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| invalid-mips5.s | 19 daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
28 dsll $zero,$s4,18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
29 dsll $zero,$s4,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
32 dsllv $zero,$s4,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
41 dsrl $s3,$6,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
44 dsrlv $s3,$t2,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
63 movt $zero,$s4,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
64 movt $zero,$s4,$fcc5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| invalid-mips3.s | 19 daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
28 dsll $zero,$s4,18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
29 dsll $zero,$s4,$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
32 dsllv $zero,$s4,$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
41 dsrl $s3,$6,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
44 dsrlv $s3,$14,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips3/ |
| invalid-mips4.s | 21 movt $zero,$s4,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
22 movt $zero,$s4,$fcc5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /ndk/sources/cxx-stl/llvm-libc++/libcxx/test/re/re.regex/re.regex.construct/ |
| il_flg.pass.cpp | 38 std::string s4("(a([bc]))");
|
| /external/chromium_org/third_party/libvpx/source/libvpx/vp9/common/mips/dspr2/ |
| vp9_itrans4_dspr2.c | 323 int s0, s1, s2, s3, s4, s5, s6, s7; local
340 s4 = sinpi_1_9 * x2;
346 x1 = s1 - s4 - s6;
|
| vp9_itrans16_dspr2.c | 915 int s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15; local
[all...] |
| /external/jemalloc/test/include/test/ |
| math.h | 224 double e, aa, xx, c, ch, a, q, p1, p2, t, x, b, s1, s2, s3, s4, s5, s6; local
287 s4 = (252.0 + a * (672.0 + 1182.0 * a) + c * (294.0 + a *
292 - b * (s4 - b * (s5 - b * s6))))));
|
| /external/libvpx/libvpx/vp9/common/mips/dspr2/ |
| vp9_itrans4_dspr2.c | 323 int s0, s1, s2, s3, s4, s5, s6, s7; local
340 s4 = sinpi_1_9 * x2;
346 x1 = s1 - s4 - s6;
|
| vp9_itrans16_dspr2.c | 915 int s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15; local
[all...] |
| /external/llvm/test/MC/AArch64/ |
| arm64-elf-relocs.s | 171 ldr s4, [x5, :lo12:sym]
174 // CHECK: ldr s4, [x5, :lo12:sym]
181 ldr s4, [x5, #:dtprel_lo12_nc:sym]
184 // CHECK: ldr s4, [x5, :dtprel_lo12_nc:sym]
192 ldr s4, [x5, :tprel_lo12_nc:sym]
195 // CHECK: ldr s4, [x5, :tprel_lo12_nc:sym]
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/mips/dspr2/ |
| vp9_itrans4_dspr2.c | 323 int s0, s1, s2, s3, s4, s5, s6, s7; local
340 s4 = sinpi_1_9 * x2;
346 x1 = s1 - s4 - s6;
|
| vp9_itrans16_dspr2.c | 915 int s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15; local
[all...] |
| /external/libvpx/libvpx/vp9/common/ |
| vp9_idct.c | 242 int s0, s1, s2, s3, s4, s5, s6, s7; local
258 s4 = sinpi_1_9 * x2;
264 x1 = s1 - s4 - s6;
315 int s0, s1, s2, s3, s4, s5, s6, s7; local
337 s4 = cospi_18_64 * x4 + cospi_14_64 * x5;
342 x0 = dct_const_round_shift(s0 + s4);
346 x4 = dct_const_round_shift(s0 - s4);
356 s4 = cospi_8_64 * x4 + cospi_24_64 * x5;
365 x4 = dct_const_round_shift(s4 + s6);
367 x6 = dct_const_round_shift(s4 - s6)
639 int s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15; local
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/ |
| vp9_idct.c | 242 int s0, s1, s2, s3, s4, s5, s6, s7; local
258 s4 = sinpi_1_9 * x2;
264 x1 = s1 - s4 - s6;
315 int s0, s1, s2, s3, s4, s5, s6, s7; local
337 s4 = cospi_18_64 * x4 + cospi_14_64 * x5;
342 x0 = dct_const_round_shift(s0 + s4);
346 x4 = dct_const_round_shift(s0 - s4);
356 s4 = cospi_8_64 * x4 + cospi_24_64 * x5;
365 x4 = dct_const_round_shift(s4 + s6);
367 x6 = dct_const_round_shift(s4 - s6)
639 int s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15; local
[all...] |
| /external/chromium_org/third_party/libvpx/source/libvpx/vp9/common/ |
| vp9_idct.c | 276 tran_high_t s0, s1, s2, s3, s4, s5, s6, s7; local
292 s4 = sinpi_1_9 * x2;
298 x1 = s1 - s4 - s6;
349 int s0, s1, s2, s3, s4, s5, s6, s7; local
371 s4 = cospi_18_64 * x4 + cospi_14_64 * x5;
376 x0 = dct_const_round_shift(s0 + s4);
380 x4 = dct_const_round_shift(s0 - s4);
390 s4 = cospi_8_64 * x4 + cospi_24_64 * x5;
399 x4 = dct_const_round_shift(s4 + s6);
401 x6 = dct_const_round_shift(s4 - s6)
674 tran_high_t s0, s1, s2, s3, s4, s5, s6, s7, s8; local
1688 tran_high_t s0, s1, s2, s3, s4, s5, s6, s7; local
1764 tran_high_t s0, s1, s2, s3, s4, s5, s6, s7; local
2093 tran_high_t s0, s1, s2, s3, s4, s5, s6, s7, s8; local
[all...] |
| /external/llvm/test/MC/Mips/mips2/ |
| valid.s | 59 lwl $s4,-4231($15)
75 mult $sp,$s4
102 sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b]
112 srl $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
113 srlv $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
|
| invalid-mips32.s | 31 movt $zero,$s4,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
32 movt $zero,$s4,$fcc5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
42 mul $s0,$s4,$at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/chromium_org/v8/test/mjsunit/ |
| uri.js | 40 var s4 = String.fromCharCode(cc4); variable
59 assertEquals('%D5%95', encodeURI(s4));
70 assertEquals(cc4, decodeURI(encodeURI(s4)).charCodeAt(0));
|
