| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_fs_vector_splitting.cpp | 273 unsigned int writemask; local
280 writemask = 1;
283 writemask = 1 << i;
296 NULL, writemask));
|
| brw_vec4.cpp | 123 if (!(reg.writemask & (1 << i)))
152 this->writemask = WRITEMASK_XYZW;
169 int writemask)
176 this->writemask = writemask;
195 this->writemask = WRITEMASK_XYZW;
735 if (!(inst->dst.writemask & (1 << i)))
783 if (scan_inst->dst.writemask & (1 << i) &&
853 scan_inst->dst.writemask &= inst->dst.writemask;
[all...] |
| brw_vec4_visitor.cpp | 227 * writemask, note that uniform packing and register allocation
234 if (dst.writemask != WRITEMASK_XYZW) {
304 if (dst.writemask != WRITEMASK_XYZW) {
447 this->writemask = WRITEMASK_XYZW;
449 this->writemask = (1 << type->vector_elements) - 1;
808 dst.writemask = (1 << c->key.gl_fixed_input_size[i]) - 1;
862 reg->writemask = WRITEMASK_X;
865 reg->writemask = WRITEMASK_Y;
1048 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1918 int writemask = intel->gen == 4 ? WRITEMASK_W : WRITEMASK_X; local
1963 int mrf, writemask; local
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_vec4.cpp | 123 if (!(reg.writemask & (1 << i)))
152 this->writemask = WRITEMASK_XYZW;
169 int writemask)
176 this->writemask = writemask;
195 this->writemask = WRITEMASK_XYZW;
735 if (!(inst->dst.writemask & (1 << i)))
783 if (scan_inst->dst.writemask & (1 << i) &&
853 scan_inst->dst.writemask &= inst->dst.writemask;
[all...] |
| brw_vec4_visitor.cpp | 227 * writemask, note that uniform packing and register allocation
234 if (dst.writemask != WRITEMASK_XYZW) {
304 if (dst.writemask != WRITEMASK_XYZW) {
447 this->writemask = WRITEMASK_XYZW;
449 this->writemask = (1 << type->vector_elements) - 1;
808 dst.writemask = (1 << c->key.gl_fixed_input_size[i]) - 1;
862 reg->writemask = WRITEMASK_X;
865 reg->writemask = WRITEMASK_Y;
1048 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1918 int writemask = intel->gen == 4 ? WRITEMASK_W : WRITEMASK_X; local
1963 int mrf, writemask; local
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/program/ |
| ir_to_mesa.cpp | 105 dst_reg(gl_register_file file, int writemask)
109 this->writemask = writemask;
118 this->writemask = 0;
127 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */ member in class:dst_reg
146 this->writemask = WRITEMASK_XYZW;
399 assert(dst.writemask != 0);
435 int done_mask = ~dst.writemask;
469 inst->dst.writemask = this_mask;
513 int done_mask = ~dst.writemask;
[all...] |
| /external/mesa3d/src/mesa/program/ |
| ir_to_mesa.cpp | 105 dst_reg(gl_register_file file, int writemask)
109 this->writemask = writemask;
118 this->writemask = 0;
127 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */ member in class:dst_reg
146 this->writemask = WRITEMASK_XYZW;
399 assert(dst.writemask != 0);
435 int done_mask = ~dst.writemask;
469 inst->dst.writemask = this_mask;
513 int done_mask = ~dst.writemask;
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/llvmpipe/ |
| lp_bld_depth.c | 276 if (stencil[0].writemask != 0xff ||
277 (stencil[1].enabled && front_facing != NULL && stencil[1].writemask != 0xff)) {
278 /* mask &= stencil[0].writemask */
279 LLVMValueRef writemask = lp_build_const_int_vec(bld->gallivm, bld->type, local
280 stencil[0].writemask);
281 if (stencil[1].enabled && stencil[1].writemask != stencil[0].writemask && front_facing != NULL) {
283 stencil[1].writemask);
284 writemask = lp_build_select(bld, front_facing, writemask, back_writemask)
[all...] |
| /external/mesa3d/src/gallium/drivers/llvmpipe/ |
| lp_bld_depth.c | 276 if (stencil[0].writemask != 0xff ||
277 (stencil[1].enabled && front_facing != NULL && stencil[1].writemask != 0xff)) {
278 /* mask &= stencil[0].writemask */
279 LLVMValueRef writemask = lp_build_const_int_vec(bld->gallivm, bld->type, local
280 stencil[0].writemask);
281 if (stencil[1].enabled && stencil[1].writemask != stencil[0].writemask && front_facing != NULL) {
283 stencil[1].writemask);
284 writemask = lp_build_select(bld, front_facing, writemask, back_writemask)
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/include/pipe/ |
| p_state.h | 219 unsigned writemask:1; /**< allow depth buffer writes? */ member in struct:pipe_depth_state
232 unsigned writemask:8; member in struct:pipe_stencil_state
|
| /external/chromium_org/third_party/mesa/src/src/glsl/ |
| ir_builder.cpp | 49 assign(deref lhs, operand rhs, int writemask)
55 NULL, writemask);
|
| ir_builder.h | 84 ir_assignment *assign(deref lhs, operand rhs, int writemask);
|
| /external/mesa3d/src/gallium/include/pipe/ |
| p_state.h | 219 unsigned writemask:1; /**< allow depth buffer writes? */ member in struct:pipe_depth_state
232 unsigned writemask:8; member in struct:pipe_stencil_state
|
| /external/mesa3d/src/glsl/ |
| ir_builder.cpp | 49 assign(deref lhs, operand rhs, int writemask)
55 NULL, writemask);
|
| ir_builder.h | 84 ir_assignment *assign(deref lhs, operand rhs, int writemask);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
| radeon_opcodes.c | 524 unsigned int writemask,
537 if (!writemask)
542 srcmasks[src] |= writemask;
545 srcmasks[src] |= writemask;
|
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| radeon_opcodes.c | 524 unsigned int writemask,
537 if (!writemask)
542 srcmasks[src] |= writemask;
545 srcmasks[src] |= writemask;
|
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/util/ |
| u_blit.c | 107 ctx->dsa_write_depth.depth.writemask = 1;
115 ctx->dsa_write_stencil.stencil[0].writemask = 0xff;
202 set_fragment_shader(struct blit_state *ctx, uint writemask,
205 if (!ctx->fs[pipe_tex][writemask]) {
208 ctx->fs[pipe_tex][writemask] =
211 writemask);
214 cso_set_fragment_shader_handle(ctx->cso, ctx->fs[pipe_tex][writemask]);
420 * \param writemask controls which channels in the dest surface are sourced
435 uint writemask, uint zs_writemask)
476 assert((writemask && !zs_writemask && !is_depth && !is_stencil) |
[all...] |
| u_simple_shaders.c | 104 * IMM {0,0,0,1} // (if writemask != 0xf)
105 * MOV OUT[0], IMM[0] // (if writemask != 0xf)
106 * TEX OUT[0].writemask, IN[0], SAMP[0], 2D;
111 * \param writemask mask of TGSI_WRITEMASK_x
117 unsigned writemask )
141 if (writemask != TGSI_WRITEMASK_XYZW) {
148 ureg_writemask(out, writemask),
|
| /external/mesa3d/src/gallium/auxiliary/util/ |
| u_blit.c | 107 ctx->dsa_write_depth.depth.writemask = 1;
115 ctx->dsa_write_stencil.stencil[0].writemask = 0xff;
202 set_fragment_shader(struct blit_state *ctx, uint writemask,
205 if (!ctx->fs[pipe_tex][writemask]) {
208 ctx->fs[pipe_tex][writemask] =
211 writemask);
214 cso_set_fragment_shader_handle(ctx->cso, ctx->fs[pipe_tex][writemask]);
420 * \param writemask controls which channels in the dest surface are sourced
435 uint writemask, uint zs_writemask)
476 assert((writemask && !zs_writemask && !is_depth && !is_stencil) |
[all...] |
| u_simple_shaders.c | 104 * IMM {0,0,0,1} // (if writemask != 0xf)
105 * MOV OUT[0], IMM[0] // (if writemask != 0xf)
106 * TEX OUT[0].writemask, IN[0], SAMP[0], 2D;
111 * \param writemask mask of TGSI_WRITEMASK_x
117 unsigned writemask )
141 if (writemask != TGSI_WRITEMASK_XYZW) {
148 ureg_writemask(out, writemask),
|
| /external/chromium_org/third_party/mesa/src/src/mesa/state_tracker/ |
| st_glsl_to_tgsi.cpp | 148 st_dst_reg(gl_register_file file, int writemask, int type)
152 this->writemask = writemask;
163 this->writemask = 0;
172 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */ member in class:st_dst_reg
194 this->writemask = WRITEMASK_XYZW;
596 assert(dst.writemask != 0);
708 int done_mask = ~dst.writemask;
742 inst->dst.writemask = this_mask;
798 int done_mask = ~dst.writemask;
[all...] |
| /external/mesa3d/src/mesa/state_tracker/ |
| st_glsl_to_tgsi.cpp | 148 st_dst_reg(gl_register_file file, int writemask, int type)
152 this->writemask = writemask;
163 this->writemask = 0;
172 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */ member in class:st_dst_reg
194 this->writemask = WRITEMASK_XYZW;
596 assert(dst.writemask != 0);
708 int done_mask = ~dst.writemask;
742 inst->dst.writemask = this_mask;
798 int done_mask = ~dst.writemask;
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/ |
| tgsi_text.c | 336 uint *writemask )
344 *writemask = TGSI_WRITEMASK_NONE;
348 *writemask |= TGSI_WRITEMASK_X;
352 *writemask |= TGSI_WRITEMASK_Y;
356 *writemask |= TGSI_WRITEMASK_Z;
360 *writemask |= TGSI_WRITEMASK_W;
363 if (*writemask == TGSI_WRITEMASK_NONE) {
364 report_error( ctx, "Writemask expected" );
371 *writemask = TGSI_WRITEMASK_XYZW;
683 uint writemask; local
1071 uint writemask; local
[all...] |
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_text.c | 336 uint *writemask )
344 *writemask = TGSI_WRITEMASK_NONE;
348 *writemask |= TGSI_WRITEMASK_X;
352 *writemask |= TGSI_WRITEMASK_Y;
356 *writemask |= TGSI_WRITEMASK_Z;
360 *writemask |= TGSI_WRITEMASK_W;
363 if (*writemask == TGSI_WRITEMASK_NONE) {
364 report_error( ctx, "Writemask expected" );
371 *writemask = TGSI_WRITEMASK_XYZW;
683 uint writemask; local
1071 uint writemask; local
[all...] |
