| /external/flac/libFLAC/ |
| float.c | 62 /* undefined */ 0x00000000,
64 /* lg(4/3) = */ 0x00000000,
65 /* lg(8/7) = */ 0x00000000,
66 /* lg(16/15) = */ 0x00000000,
67 /* lg(32/31) = */ 0x00000000,
68 /* lg(64/63) = */ 0x00000000,
69 /* lg(128/127) = */ 0x00000000,
70 /* lg(256/255) = */ 0x00000000,
71 /* lg(512/511) = */ 0x00000000,
72 /* lg(1024/1023) = */ 0x00000000,
[all...] |
| /hardware/qcom/msm8960/kernel-headers/linux/mfd/wcd9xxx/ |
| wcd9310_registers.h | 51 #define TABLA_A_PIN_CTL_OE0__POR (0x00000000)
54 #define TABLA_A_PIN_CTL_OE1__POR (0x00000000)
56 #define TABLA_A_PIN_CTL_DATA0__POR (0x00000000)
59 #define TABLA_A_PIN_CTL_DATA1__POR (0x00000000)
61 #define TABLA_A_HDRIVE_GENERIC__POR (0x00000000)
71 #define TABLA_A_PROCESS_MONITOR_CTL1__POR (0x00000000)
74 #define TABLA_A_PROCESS_MONITOR_CTL2__POR (0x00000000)
79 #define TABLA_A_QFUSE_CTL__POR (0x00000000)
81 #define TABLA_A_QFUSE_STATUS__POR (0x00000000)
84 #define TABLA_A_QFUSE_DATA_OUT0__POR (0x00000000)
[all...] |
| wcd9304_registers.h | 22 #define SITAR_A_PIN_CTL_OE0__POR (0x00000000)
25 #define SITAR_A_PIN_CTL_OE1__POR (0x00000000)
27 #define SITAR_A_PIN_CTL_DATA0__POR (0x00000000)
30 #define SITAR_A_PIN_CTL_DATA1__POR (0x00000000)
32 #define SITAR_A_HDRIVE_GENERIC__POR (0x00000000)
42 #define SITAR_A_PROCESS_MONITOR_CTL1__POR (0x00000000)
45 #define SITAR_A_PROCESS_MONITOR_CTL2__POR (0x00000000)
50 #define SITAR_A_QFUSE_CTL__POR (0x00000000)
52 #define SITAR_A_QFUSE_STATUS__POR (0x00000000)
55 #define SITAR_A_QFUSE_DATA_OUT0__POR (0x00000000)
[all...] |
| wcd9xxx_registers.h | 22 #define WCD9XXX_A_CHIP_CTL__POR (0x00000000)
25 #define WCD9XXX_A_CHIP_STATUS__POR (0x00000000)
27 #define WCD9XXX_A_CHIP_ID_BYTE_0__POR (0x00000000)
30 #define WCD9XXX_A_CHIP_ID_BYTE_1__POR (0x00000000)
32 #define WCD9XXX_A_CHIP_ID_BYTE_2__POR (0x00000000)
50 #define WCD9XXX_A_CDC_CTL__POR (0x00000000)
|
| /hardware/qcom/msm8960/original-kernel-headers/linux/mfd/wcd9xxx/ |
| wcd9310_registers.h | 40 #define TABLA_A_PIN_CTL_OE0__POR (0x00000000)
42 #define TABLA_A_PIN_CTL_OE1__POR (0x00000000)
44 #define TABLA_A_PIN_CTL_DATA0__POR (0x00000000)
46 #define TABLA_A_PIN_CTL_DATA1__POR (0x00000000)
48 #define TABLA_A_HDRIVE_GENERIC__POR (0x00000000)
56 #define TABLA_A_PROCESS_MONITOR_CTL1__POR (0x00000000)
58 #define TABLA_A_PROCESS_MONITOR_CTL2__POR (0x00000000)
62 #define TABLA_A_QFUSE_CTL__POR (0x00000000)
64 #define TABLA_A_QFUSE_STATUS__POR (0x00000000)
66 #define TABLA_A_QFUSE_DATA_OUT0__POR (0x00000000)
[all...] |
| wcd9304_registers.h | 17 #define SITAR_A_PIN_CTL_OE0__POR (0x00000000)
19 #define SITAR_A_PIN_CTL_OE1__POR (0x00000000)
21 #define SITAR_A_PIN_CTL_DATA0__POR (0x00000000)
23 #define SITAR_A_PIN_CTL_DATA1__POR (0x00000000)
25 #define SITAR_A_HDRIVE_GENERIC__POR (0x00000000)
33 #define SITAR_A_PROCESS_MONITOR_CTL1__POR (0x00000000)
35 #define SITAR_A_PROCESS_MONITOR_CTL2__POR (0x00000000)
39 #define SITAR_A_QFUSE_CTL__POR (0x00000000)
41 #define SITAR_A_QFUSE_STATUS__POR (0x00000000)
43 #define SITAR_A_QFUSE_DATA_OUT0__POR (0x00000000)
[all...] |
| wcd9xxx_registers.h | 17 #define WCD9XXX_A_CHIP_CTL__POR (0x00000000)
19 #define WCD9XXX_A_CHIP_STATUS__POR (0x00000000)
21 #define WCD9XXX_A_CHIP_ID_BYTE_0__POR (0x00000000)
23 #define WCD9XXX_A_CHIP_ID_BYTE_1__POR (0x00000000)
25 #define WCD9XXX_A_CHIP_ID_BYTE_2__POR (0x00000000)
39 #define WCD9XXX_A_CDC_CTL__POR (0x00000000)
|
| /bionic/libc/upstream-openbsd/android/include/ |
| gd_qnan.h | 35 #define d_QNAN0 0x00000000
43 #define ld_QNAN1 0x00000000
44 #define ld_QNAN2 0x00000000
45 #define ld_QNAN3 0x00000000
|
| /hardware/intel/img/psb_video/fw/topazhp/ |
| H264MasterFirmwareLLRC_bin.c | [all...] |
| /external/chromium_org/third_party/cld/encodings/compact_lang_det/generated/ |
| compact_lang_det_generated_cjkbis_0.cc | 29 { {0x00000000,0x00000000,0x00000000,0x00000000}}, // [000] c
34 0x00000000, };
|
| compact_lang_det_generated_longwords8_0.cc | 34 { {0x00000000,0x00000000,0x00000000,0x00000000}}, // [000] c
39 0x00000000, };
|
| /hardware/intel/img/psb_video/fw/topazsc/ |
| H263SlaveFirmwareCBR_bin.c | [all...] |
| H263MasterFirmwareVBR_bin.c | [all...] |
| H263SlaveFirmwareVBR_bin.c | [all...] |
| H263MasterFirmware_bin.c | [all...] |
| MPG4MasterFirmwareCBR_bin.c | [all...] |
| MPG4SlaveFirmwareCBR_bin.c | [all...] |
| H264MasterFirmwareVBR_bin.c | [all...] |
| MPG4MasterFirmwareVBR_bin.c | [all...] |
| H264MasterFirmwareCBR_bin.c | [all...] |
| /hardware/qcom/msm8x74/kernel-headers/linux/mfd/wcd9xxx/ |
| wcd9xxx_registers.h | 22 #define WCD9XXX_A_CHIP_CTL__POR (0x00000000)
25 #define WCD9XXX_A_CHIP_STATUS__POR (0x00000000)
27 #define WCD9XXX_A_CHIP_ID_BYTE_0__POR (0x00000000)
30 #define WCD9XXX_A_CHIP_ID_BYTE_1__POR (0x00000000)
32 #define WCD9XXX_A_CHIP_ID_BYTE_2__POR (0x00000000)
50 #define WCD9XXX_A_CDC_CTL__POR (0x00000000)
|
| /hardware/qcom/msm8x74/original-kernel-headers/linux/mfd/wcd9xxx/ |
| wcd9xxx_registers.h | 17 #define WCD9XXX_A_CHIP_CTL__POR (0x00000000)
19 #define WCD9XXX_A_CHIP_STATUS__POR (0x00000000)
21 #define WCD9XXX_A_CHIP_ID_BYTE_0__POR (0x00000000)
23 #define WCD9XXX_A_CHIP_ID_BYTE_1__POR (0x00000000)
25 #define WCD9XXX_A_CHIP_ID_BYTE_2__POR (0x00000000)
39 #define WCD9XXX_A_CDC_CTL__POR (0x00000000)
|
| /external/compiler-rt/test/builtins/Unit/ |
| umodsi3_test.c | 32 {0x00000000, 0x00000001, 0x00000000},
33 {0x00000000, 0x00000002, 0x00000000},
34 {0x00000000, 0x00000003, 0x00000000},
35 {0x00000000, 0x00000010, 0x00000000},
36 {0x00000000, 0x078644FA, 0x00000000},
[all...] |
| /external/chromium_org/third_party/expat/files/lib/ |
| nametab.h | 2 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3 0x00000000, 0x00000000, 0x00000000, 0x00000000,
6 0x00000000, 0x04000000, 0x87FFFFFE, 0x07FFFFFE,
7 0x00000000, 0x00000000, 0xFF7FFFFF, 0xFF7FFFFF
[all...] |
| /external/expat/lib/ |
| nametab.h | 2 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3 0x00000000, 0x00000000, 0x00000000, 0x00000000,
6 0x00000000, 0x04000000, 0x87FFFFFE, 0x07FFFFFE,
7 0x00000000, 0x00000000, 0xFF7FFFFF, 0xFF7FFFFF
[all...] |
