| /external/llvm/test/MC/Mips/mips32r6/ |
| valid.s | 50 bgtzalc $2, 1332 # CHECK: bgtzalc $2, 1332 # encoding: [0x1c,0x02,0x01,0x4d]
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| valid.s | 50 bgtzalc $2, 1332 # CHECK: bgtzalc $2, 1332 # encoding: [0x1c,0x02,0x01,0x4d]
|
| /external/chromium_org/v8/src/mips/ |
| assembler-mips.h | 694 void bgtzalc(Register rt, int16_t offset);
695 void bgtzalc(Register rt, Label* L) { function in class:v8::internal::Assembler
696 bgtzalc(rt, branch_offset_compact(L, false)>>2);
[all...] |
| disasm-mips.cc | 1069 Format(instr, "bgtzalc 'rt, 'imm16u");
[all...] |
| assembler-mips.cc | 1342 void Assembler::bgtzalc(Register rt, int16_t offset) { function in class:v8::Assembler
[all...] |
| /external/chromium_org/v8/src/mips64/ |
| assembler-mips64.h | 686 void bgtzalc(Register rt, int16_t offset);
687 void bgtzalc(Register rt, Label* L) { function in class:v8::internal::Assembler
688 bgtzalc(rt, branch_offset_compact(L, false)>>2);
[all...] |
| disasm-mips64.cc | [all...] |
| assembler-mips64.cc | 1321 void Assembler::bgtzalc(Register rt, int16_t offset) { function in class:v8::Assembler
[all...] |
| /external/llvm/test/MC/Disassembler/Mips/ |
| mips32r6.txt | 39 0x1c 0x02 0x01 0x4d # CHECK: bgtzalc $2,
|
| mips64r6.txt | 39 0x1c 0x02 0x01 0x4d # CHECK: bgtzalc $2,
|
| /external/llvm/lib/Target/Mips/Disassembler/ |
| MipsDisassembler.cpp | 619 // BGTZALC if rs == 0 && rt != 0
633 MI.setOpcode(Mips::BGTZALC);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips32r6InstrInfo.td | 438 class BGTZALC_DESC : CMP_CBR_RT_Z_DESC_BASE<"bgtzalc", brtarget, GPR32Opnd> {
662 def BGTZALC : BGTZALC_ENC, BGTZALC_DESC, ISA_MIPS32R6;
[all...] |
| Mips32r6InstrFormats.td | 359 // BLEZC/BGEZC/BEQZALC/BNEZALC/BGTZALC require that rs == 0 && rt != 0
|
| /prebuilts/sdk/tools/linux/ |
| libLLVM.so | |
