| /external/llvm/test/MC/Mips/mips32r6/ |
| valid.s | 52 bltzalc $2, 1332 # CHECK: bltzalc $2, 1332 # encoding: [0x1c,0x42,0x01,0x4d]
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| valid.s | 52 bltzalc $2, 1332 # CHECK: bltzalc $2, 1332 # encoding: [0x1c,0x42,0x01,0x4d]
|
| /external/chromium_org/v8/src/mips/ |
| assembler-mips.h | 690 void bltzalc(Register rt, int16_t offset);
691 void bltzalc(Register rt, Label* L) { function in class:v8::internal::Assembler
692 bltzalc(rt, branch_offset_compact(L, false)>>2);
[all...] |
| disasm-mips.cc | 1066 Format(instr, "bltzalc 'rt, 'imm16u");
[all...] |
| assembler-mips.cc | 1335 void Assembler::bltzalc(Register rt, int16_t offset) { function in class:v8::Assembler
[all...] |
| /external/chromium_org/v8/src/mips64/ |
| assembler-mips64.h | 682 void bltzalc(Register rt, int16_t offset);
683 void bltzalc(Register rt, Label* L) { function in class:v8::internal::Assembler
684 bltzalc(rt, branch_offset_compact(L, false)>>2);
[all...] |
| disasm-mips64.cc | [all...] |
| assembler-mips64.cc | 1314 void Assembler::bltzalc(Register rt, int16_t offset) { function in class:v8::Assembler
[all...] |
| /external/llvm/test/MC/Disassembler/Mips/ |
| mips32r6.txt | 41 0x1c 0x42 0x01 0x4d # CHECK: bltzalc $2,
|
| mips64r6.txt | 41 0x1c 0x42 0x01 0x4d # CHECK: bltzalc $2,
|
| /external/llvm/lib/Target/Mips/Disassembler/ |
| MipsDisassembler.cpp | 620 // BLTZALC if rs != 0 && rs == rt
636 MI.setOpcode(Mips::BLTZALC);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips32r6InstrInfo.td | 446 class BLTZALC_DESC : CMP_CBR_RT_Z_DESC_BASE<"bltzalc", brtarget, GPR32Opnd> {
669 def BLTZALC : BLTZALC_ENC, BLTZALC_DESC, ISA_MIPS32R6;
[all...] |
| Mips32r6InstrFormats.td | 374 // BLTZC/BGTZC/BLTZALC/BGEZALC require that rs == rt && rt != 0
|
| /prebuilts/sdk/tools/linux/ |
| libLLVM.so | |
