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  /external/valgrind/main/VEX/priv/
host_generic_regs.h 78 /* HRegClass describes host register classes which the instruction
108 HRegClass;
110 extern void ppHRegClass ( HRegClass );
117 static inline HReg mkHReg ( UInt regno, HRegClass rc, Bool virtual ) {
128 static inline HRegClass hregClass ( HReg r ) {
132 return (HRegClass)rc;
host_generic_reg_alloc2.c 70 HRegClass reg_class;
566 vreg_lrs[k].reg_class = hregClass(vreg);
569 vassert(vreg_lrs[k].reg_class == hregClass(vreg));
831 definition of HRegClass in host_generic_regs.h, that means,
836 HRegClass. */
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host_generic_regs.c 43 void ppHRegClass ( HRegClass hrc )
61 switch (hregClass(r)) {
host_arm_defs.c 61 switch (hregClass(reg)) {
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host_mips_isel.c 327 vassert(hregClass(r_dst) == hregClass(r_src));
328 vassert(hregClass(r_src) == HRcInt32 || hregClass(r_src) == HRcInt64);
359 vassert(hregClass(r_srcHi) == HRcInt32);
360 vassert(hregClass(r_srcLo) == HRcInt32);
691 return toBool(hregClass(am->Mam.IR.base) == HRcGPR(mode64) &&
695 return toBool(hregClass(am->Mam.RR.base) == HRcGPR(mode64) &&
697 hregClass(am->Mam.RR.index) == HRcGPR(mode64) &&
787 vassert(hregClass(r) == HRcGPR(env->mode64))
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host_arm64_defs.c 58 switch (hregClass(reg)) {
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host_ppc_isel.c 482 vassert(hregClass(r_dst) == hregClass(r_src));
483 vassert(hregClass(r_src) == HRcInt32 ||
484 hregClass(r_src) == HRcInt64);
537 vassert(hregClass(r_srcHi) == HRcInt32);
538 vassert(hregClass(r_srcLo) == HRcInt32);
562 vassert(hregClass(r_src) == HRcInt64);
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host_amd64_isel.c 266 toBool( hregClass(am->Aam.IR.reg) == HRcInt64
271 toBool( hregClass(am->Aam.IRRS.base) == HRcInt64
273 && hregClass(am->Aam.IRRS.index) == HRcInt64
313 vassert(hregClass(src) == HRcInt64);
314 vassert(hregClass(dst) == HRcInt64);
322 vassert(hregClass(src) == HRcVec128);
323 vassert(hregClass(dst) == HRcVec128);
907 vassert(hregClass(r) == HRcInt64);
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host_mips_defs.c 83 vassert(hregClass(reg) == HRcInt32 || hregClass(reg) == HRcInt64 ||
84 hregClass(reg) == HRcFlt32 || hregClass(reg) == HRcFlt64);
87 switch (hregClass(reg)) {
918 hregClass(am->Mam.RR.index),
938 hregClass(am->Mam.RR.index),
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host_x86_isel.c 291 vassert(hregClass(src) == HRcInt32);
292 vassert(hregClass(dst) == HRcInt32);
301 vassert(hregClass(src) == HRcVec128);
302 vassert(hregClass(dst) == HRcVec128);
845 vassert(hregClass(r) == HRcInt32);
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host_arm_isel.c 292 vassert(hregClass(src) == HRcInt32);
293 vassert(hregClass(dst) == HRcInt32);
748 toBool( hregClass(am->ARMam1.RI.reg) == HRcInt32
755 toBool( hregClass(am->ARMam1.RRS.base) == HRcInt32
757 && hregClass(am->ARMam1.RRS.index) == HRcInt32
817 toBool( hregClass(am->ARMam2.RI.reg) == HRcInt32
823 toBool( hregClass(am->ARMam2.RR.base) == HRcInt32
825 && hregClass(am->ARMam2.RR.index) == HRcInt32
880 return toBool( hregClass(am->reg) == HRcInt32
957 vassert(hregClass(ri->ARMri84.R.reg) == HRcInt32)
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host_s390_isel.c     [all...]
host_x86_defs.c 58 switch (hregClass(reg)) {
830 vassert(hregClass(dst) == HRcVec128);
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host_amd64_defs.c 59 switch (hregClass(reg)) {
93 switch (hregClass(reg)) {
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host_s390_defs.c 93 switch (hregClass(reg)) {
104 switch (hregClass(reg)) {
330 return hregIsVirtual(reg) && hregClass(reg) == HRcInt64;
474 switch (hregClass(rreg)) {
481 ppHRegClass(hregClass(rreg));
500 switch (hregClass(rreg)) {
507 ppHRegClass(hregClass(rreg));
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host_arm64_isel.c 849 toBool( hregClass(am->ARM64am.RI9.reg) == HRcInt64
857 toBool( hregClass(am->ARM64am.RI12.reg) == HRcInt64
865 toBool( hregClass(am->ARM64am.RR.base) == HRcInt64
867 && hregClass(am->ARM64am.RR.index) == HRcInt64
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host_ppc_defs.c 65 switch (hregClass(reg)) {
528 vassert(hregClass(reg) == HRcVec128);
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