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  /external/chromium_org/v8/src/mips/
constants-mips.cc 328 // 26 bits immediate type instructions. e.g.: j imm26.
assembler-mips.cc 761 uint32_t imm26 = imm28 >> 2; variable
762 DCHECK(is_uint26(imm26));
764 instr_at_put(pos, instr | (imm26 & kImm26Mask));
2382 uint32_t imm26 = imm28 >> 2; local
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disasm-mips.cc 357 case 'i': { // 'imm16u or 'imm26.
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  /external/chromium_org/v8/src/mips64/
constants-mips64.cc 349 // 26 bits immediate type instructions. e.g.: j imm26.
assembler-mips64.cc 745 uint32_t imm26 = imm28 >> 2; variable
746 DCHECK(is_uint26(imm26));
748 instr_at_put(pos, instr | (imm26 & kImm26Mask));
2620 uint32_t imm26 = imm28 >> 2; local
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disasm-mips64.cc 358 case 'i': { // 'imm16u or 'imm26.
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  /external/chromium_org/v8/src/arm64/
assembler-arm64-inl.h 1017 Instr Assembler::ImmUncondBranch(int imm26) {
1018 CHECK(is_int26(imm26));
1019 return truncate_to_int26(imm26) << ImmUncondBranch_offset;
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assembler-arm64.cc 977 void Assembler::b(int imm26) {
978 Emit(B | ImmUncondBranch(imm26));
999 void Assembler::bl(int imm26) {
1001 Emit(BL | ImmUncondBranch(imm26));
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assembler-arm64.h     [all...]
  /external/llvm/lib/Target/Mips/
Mips16InstrFormats.td 414 bits<26> imm26;
421 let Inst{25-21} = imm26{20-16};
422 let Inst{20-16} = imm26{25-21};
423 let Inst{15-0} = imm26{15-0};
  /external/vixl/doc/
supported-instructions.md 112 void b(int imm26)
174 void bl(int imm26)
  /external/vixl/src/a64/
assembler-a64.h 691 void b(int imm26);
700 void bl(int imm26);
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assembler-a64.cc 449 void Assembler::b(int imm26) {
450 Emit(B | ImmUncondBranch(imm26));
469 void Assembler::bl(int imm26) {
470 Emit(BL | ImmUncondBranch(imm26));
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  /external/chromium_org/v8/src/arm/
assembler-arm.cc 792 int imm26 = ((instr & kImm24Mask) << 8) >> 6; local
795 // blx uses bit 24 to encode bit 2 of imm26
796 imm26 += 2;
798 return pos + kPcLoadDelta + imm26;
872 int imm26 = target_pos - (pos + kPcLoadDelta); local
875 // blx uses bit 24 to encode bit 2 of imm26
876 DCHECK((imm26 & 1) == 0);
877 instr = (instr & ~(B24 | kImm24Mask)) | ((imm26 & 2) >> 1)*B24;
879 DCHECK((imm26 & 3) == 0);
882 int imm24 = imm26 >> 2
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  /art/disassembler/
disassembler_arm.cc 347 int32_t imm26 = (instruction & 0xffffff) << 2; local
348 int32_t imm32 = (imm26 << 6) >> 6; // Sign extend.
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  /external/valgrind/main/VEX/priv/
guest_arm64_toIR.c     [all...]

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