/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
nv50_ir_target.h | 139 struct OpInfo 141 OpInfo *variants; 161 inline const OpInfo& getOpInfo(const Instruction *) const; 162 inline const OpInfo& getOpInfo(const operation) const; 210 OpInfo opInfo[OP_LAST + 1]; 213 const Target::OpInfo& Target::getOpInfo(const Instruction *insn) const 215 return opInfo[MIN2(insn->op, OP_LAST)]; 218 const Target::OpInfo& Target::getOpInfo(const operation op) const 220 return opInfo[op] [all...] |
nv50_ir_target_nv50.cpp | 140 opInfo[i].variants = NULL; 141 opInfo[i].op = (operation)i; 142 opInfo[i].srcTypes = 1 << (int)TYPE_F32; 143 opInfo[i].dstTypes = 1 << (int)TYPE_F32; 144 opInfo[i].immdBits = 0xffffffff; 145 opInfo[i].srcNr = operationSrcNr[i]; 147 for (j = 0; j < opInfo[i].srcNr; ++j) { 148 opInfo[i].srcMods[j] = 0; 149 opInfo[i].srcFiles[j] = 1 << (int)FILE_GPR; 151 opInfo[i].dstMods = 0 [all...] |
/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
nv50_ir_target.h | 139 struct OpInfo 141 OpInfo *variants; 161 inline const OpInfo& getOpInfo(const Instruction *) const; 162 inline const OpInfo& getOpInfo(const operation) const; 210 OpInfo opInfo[OP_LAST + 1]; 213 const Target::OpInfo& Target::getOpInfo(const Instruction *insn) const 215 return opInfo[MIN2(insn->op, OP_LAST)]; 218 const Target::OpInfo& Target::getOpInfo(const operation op) const 220 return opInfo[op] [all...] |
nv50_ir_target_nv50.cpp | 140 opInfo[i].variants = NULL; 141 opInfo[i].op = (operation)i; 142 opInfo[i].srcTypes = 1 << (int)TYPE_F32; 143 opInfo[i].dstTypes = 1 << (int)TYPE_F32; 144 opInfo[i].immdBits = 0xffffffff; 145 opInfo[i].srcNr = operationSrcNr[i]; 147 for (j = 0; j < opInfo[i].srcNr; ++j) { 148 opInfo[i].srcMods[j] = 0; 149 opInfo[i].srcFiles[j] = 1 << (int)FILE_GPR; 151 opInfo[i].dstMods = 0 [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/codegen/ |
nv50_ir_target_nvc0.cpp | 285 opInfo[i].variants = NULL; 286 opInfo[i].op = (operation)i; 287 opInfo[i].srcTypes = 1 << (int)TYPE_F32; 288 opInfo[i].dstTypes = 1 << (int)TYPE_F32; 289 opInfo[i].immdBits = 0; 290 opInfo[i].srcNr = operationSrcNr[i]; 292 for (j = 0; j < opInfo[i].srcNr; ++j) { 293 opInfo[i].srcMods[j] = 0; 294 opInfo[i].srcFiles[j] = 1 << (int)FILE_GPR; 296 opInfo[i].dstMods = 0 [all...] |
/external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
nv50_ir_target_nvc0.cpp | 285 opInfo[i].variants = NULL; 286 opInfo[i].op = (operation)i; 287 opInfo[i].srcTypes = 1 << (int)TYPE_F32; 288 opInfo[i].dstTypes = 1 << (int)TYPE_F32; 289 opInfo[i].immdBits = 0; 290 opInfo[i].srcNr = operationSrcNr[i]; 292 for (j = 0; j < opInfo[i].srcNr; ++j) { 293 opInfo[i].srcMods[j] = 0; 294 opInfo[i].srcFiles[j] = 1 << (int)FILE_GPR; 296 opInfo[i].dstMods = 0 [all...] |
/frameworks/opt/telephony/src/java/com/android/internal/telephony/ |
OperatorInfo.java | 141 OperatorInfo opInfo = new OperatorInfo( 146 return opInfo;
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/external/llvm/lib/MC/ |
MCInstrAnalysis.cpp | 16 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL)
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/external/llvm/lib/CodeGen/SelectionDAG/ |
TargetLowering.cpp | [all...] |
SelectionDAGBuilder.cpp | [all...] |
/external/mksh/src/ |
expr.c | 28 /* the order of these enums is constrained by the order of opinfo[] */ 60 /* things that don't appear in the opinfo[] table */ 83 struct opinfo { struct 96 static const struct opinfo opinfo[] = { variable in typeref:struct:opinfo 275 s = opinfo[(int)es->tok].name; 405 opinfo[(int)op].prec == prec) { 697 for (i = 0; (n0 = opinfo[i].name[0]); i++) 698 if (c == n0 && strncmp(cp, opinfo[i].name, 699 (size_t)opinfo[i].len) == 0) [all...] |
/external/llvm/utils/TableGen/ |
AsmWriterInst.cpp | 172 CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo]; 174 unsigned MIOp = OpInfo.MIOperandNo; 175 Operands.push_back(AsmWriterOperand(OpInfo.PrinterMethodName,
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AsmMatcherEmitter.cpp | [all...] |
FixedLenDecoderEmitter.cpp | 457 const OperandInfo &OpInfo) const; [all...] |
/external/clang/lib/CodeGen/ |
CGExprComplex.cpp | 644 BinOpInfo OpInfo; 649 OpInfo.Ty = E->getComputationResultType(); 652 assert(OpInfo.Ty->isAnyComplexType()); 653 assert(CGF.getContext().hasSameUnqualifiedType(OpInfo.Ty, 655 OpInfo.RHS = Visit(E->getRHS()); 662 OpInfo.LHS = EmitComplexToComplexCast(LHSVal, LHSTy, OpInfo.Ty); 665 OpInfo.LHS = EmitScalarToComplexCast(LHSVal, LHSTy, OpInfo.Ty); 669 ComplexPairTy Result = (this->*Func)(OpInfo); [all...] |
CGExprScalar.cpp | [all...] |
/external/llvm/include/llvm/Bitcode/ |
BitCodes.h | 181 void Add(const BitCodeAbbrevOp &OpInfo) { 182 OperandList.push_back(OpInfo);
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/frameworks/base/services/core/java/com/android/server/content/ |
SyncQueue.java | 234 final SyncStorageEngine.EndPoint opInfo = syncOperation.target; 235 if (!opInfo.matchesSpec(info)) {
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/external/lldb/source/Plugins/Disassembler/llvm/ |
DisassemblerLLVMC.h | 118 int OpInfo(uint64_t PC,
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/external/llvm/include/llvm/MC/ |
MCInstrDesc.h | 148 const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands 159 (OpInfo[OpNum].Constraints & (1 << Constraint))) { 161 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf; 592 if (OpInfo[i].isPredicate())
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/external/llvm/lib/Analysis/ |
CostModel.cpp | 124 TargetTransformInfo::OperandValueKind OpInfo = 129 OpInfo = TargetTransformInfo::OK_NonUniformConstantValue; 131 OpInfo = TargetTransformInfo::OK_UniformConstantValue; 134 return OpInfo;
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/external/llvm/lib/Target/AArch64/ |
AArch64DeadRegisterDefinitionsPass.cpp | 98 switch (MI.getDesc().OpInfo[i].RegClass) {
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/external/llvm/lib/Target/ARM/ |
Thumb2SizeReduction.cpp | 728 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) 730 if (SkipPred && MCID.OpInfo[i].isPredicate()) 764 if (MCID.OpInfo[i].isPredicate()) 774 !MCID.OpInfo[i].isPredicate()) { 824 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) 834 bool isPred = (i < NumOps && MCID.OpInfo[i].isPredicate()); [all...] |
ARMCodeEmitter.cpp | [all...] |
/external/llvm/lib/Target/R600/MCTargetDesc/ |
SIMCCodeEmitter.cpp | 79 unsigned RegClass = Desc.OpInfo[OpNo].RegClass;
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