/art/compiler/dex/quick/arm/ |
utility_arm.cc | 390 LIR* ArmMir2Lir::OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1, 393 bool thumb_form = (shift == 0) && r_dest.Low8() && r_src1.Low8() && r_src2.Low8(); 452 return NewLIR4(opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg(), shift); 455 return NewLIR3(opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg()); 459 LIR* ArmMir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) { 460 return OpRegRegRegShift(op, r_dest, r_src1, r_src2, 0); 463 LIR* ArmMir2Lir::OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) { 469 bool all_low_regs = r_dest.Low8() && r_src1.Low8(); 475 return NewLIR3(kThumbLslRRI5, r_dest.GetReg(), r_src1.GetReg(), value); 477 return NewLIR3(kThumb2LslRRI5, r_dest.GetReg(), r_src1.GetReg(), value) [all...] |
codegen_arm.h | 157 LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value); 158 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2); 166 LIR* OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2,
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/art/compiler/dex/quick/arm64/ |
utility_arm64.cc | 695 LIR* Arm64Mir2Lir::OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1, 751 CHECK_EQ(r_dest.Is64Bit(), r_src1.Is64Bit()); 755 return NewLIR4(widened_opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg(), shift); 759 return NewLIR3(widened_opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg()); 763 LIR* Arm64Mir2Lir::OpRegRegRegExtend(OpKind op, RegStorage r_dest, RegStorage r_src1, 781 CHECK(r_src1.Is64Bit()); 789 CHECK(!r_src1.Is64Bit()); 797 return NewLIR4(widened_opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg(), 801 LIR* Arm64Mir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) { 802 return OpRegRegRegShift(op, r_dest, r_src1, r_src2, ENCODE_NO_SHIFT) [all...] |
codegen_arm64.h | 222 LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) OVERRIDE; 223 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) OVERRIDE; 365 LIR* OpRegRegImm64(OpKind op, RegStorage r_dest, RegStorage r_src1, int64_t value); 368 LIR* OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2, 374 LIR* OpRegRegRegExtend(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2,
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int_arm64.cc | 617 RegLocation Arm64Mir2Lir::GenDivRem(RegLocation rl_dest, RegStorage r_src1, RegStorage r_src2, 619 CHECK_EQ(r_src1.Is64Bit(), r_src2.Is64Bit()); 623 OpRegRegReg(kOpDiv, rl_result.reg, r_src1, r_src2); 625 // temp = r_src1 / r_src2 626 // dest = r_src1 - temp * r_src2 636 OpRegRegReg(kOpDiv, temp, r_src1, r_src2); 638 r_src1.GetReg(), r_src2.GetReg()); [all...] |
/art/compiler/dex/quick/mips/ |
utility_mips.cc | 161 LIR* MipsMir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) { 199 return NewLIR3(opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg()); 202 LIR* MipsMir2Lir::OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) { 271 res = NewLIR3(opcode, r_dest.GetReg(), r_src1.GetReg(), value); 273 if (r_dest != r_src1) { 275 NewLIR3(opcode, r_dest.GetReg(), r_src1.GetReg(), r_dest.GetReg()); 279 NewLIR3(opcode, r_dest.GetReg(), r_src1.GetReg(), r_scratch.GetReg());
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codegen_mips.h | 154 LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value); 155 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2);
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/art/compiler/dex/quick/x86/ |
utility_x86.cc | 445 LIR* X86Mir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, 448 if (r_dest != r_src1 && r_dest != r_src2) { 450 if (r_src1 == r_src2) { 451 OpRegCopy(r_dest, r_src1); 453 } else if (r_src1 != rs_rBP) { 455 r_src1.GetReg() /* base */, r_src2.GetReg() /* index */, 459 r_src2.GetReg() /* base */, r_src1.GetReg() /* index */, 463 OpRegCopy(r_dest, r_src1); 466 } else if (r_dest == r_src1) { 477 OpRegCopy(t_reg, r_src1); [all...] |
fp_x86.cc | 64 RegStorage r_src1 = rl_src1.reg; local 70 OpRegCopy(r_dest, r_src1);
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codegen_x86.h | 281 LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) OVERRIDE; 282 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) OVERRIDE; [all...] |
/art/compiler/dex/quick/ |
mir_to_lir.h | [all...] |