/art/compiler/dex/quick/x86/ |
int_x86.cc | 210 int32_t true_val, int32_t false_val, RegStorage rs_dest, 212 DCHECK(!left_op.IsPair() && !right_op.IsPair() && !rs_dest.IsPair()); 213 DCHECK(!left_op.IsFloat() && !right_op.IsFloat() && !rs_dest.IsFloat()); 218 LoadConstantNoClobber(rs_dest, true_val); 222 const bool dest_intersect = IsSameReg(rs_dest, left_op) || IsSameReg(rs_dest, right_op); 225 if (zero_one_case && IsByteRegister(rs_dest)) { 227 LoadConstantNoClobber(rs_dest, 0); 231 NewLIR2(kX86Set8R, rs_dest.GetReg(), 234 NewLIR2(rs_dest.Is64Bit() ? kX86Movzx8qRR : kX86Movzx8RR, rs_dest.GetReg(), rs_dest.GetReg()) [all...] |
target_x86.cc | 1790 RegStorage rs_dest = RegStorage::Solo128(mir->dalvikInsn.vA); local 1831 RegStorage rs_dest = RegStorage::Solo128(mir->dalvikInsn.vA); local 2278 RegStorage rs_dest = RegStorage::Solo128(mir->dalvikInsn.vA); local [all...] |
codegen_x86.h | 241 int32_t true_val, int32_t false_val, RegStorage rs_dest, [all...] |
/art/compiler/dex/quick/arm64/ |
int_arm64.cc | 92 RegStorage rs_dest, int result_reg_class) { 107 bool is_wide = rs_dest.Is64Bit(); 114 left_op = rs_dest; 115 LoadConstantNoClobber(rs_dest, true_val); 134 right_op = rs_dest; 135 LoadConstantNoClobber(rs_dest, false_val); 171 NewLIR4(is_wide ? WIDE(opcode) : opcode, rs_dest.GetReg(), left_op.GetReg(), right_op.GetReg(), 176 int32_t true_val, int32_t false_val, RegStorage rs_dest, 178 DCHECK(rs_dest.Valid()); 180 GenSelect(true_val, false_val, code, rs_dest, dest_reg_class) [all...] |
codegen_arm64.h | 189 int32_t true_val, int32_t false_val, RegStorage rs_dest, 387 void GenSelect(int32_t left, int32_t right, ConditionCode code, RegStorage rs_dest,
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/art/compiler/dex/quick/arm/ |
codegen_arm.h | 124 int32_t true_val, int32_t false_val, RegStorage rs_dest,
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int_arm.cc | 207 int32_t true_val, int32_t false_val, RegStorage rs_dest, 215 OpRegRegReg(kOpSub, rs_dest, left_op, right_op); 218 LoadConstant(rs_dest, code == kCondEq ? false_val : true_val); 225 LoadConstant(rs_dest, true_val); // .eq case - load true 226 LoadConstant(rs_dest, false_val); // .eq case - load true [all...] |
/art/compiler/dex/quick/mips/ |
codegen_mips.h | 123 int32_t true_val, int32_t false_val, RegStorage rs_dest,
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int_mips.cc | 219 int32_t true_val, int32_t false_val, RegStorage rs_dest, 223 LoadConstant(rs_dest, false_val); // Favors false. 225 LoadConstant(rs_dest, true_val);
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/art/compiler/dex/quick/ |
mir_to_lir.h | [all...] |